[PATCH] x86: VPEXTRQ/VPINSRQ are unavailable outside of 64-bit mode

[H.J. Lu]

On Tue, Jan 14, 2020 at 11:35 PM Jan Beulich <jbeulich@suse.com> wrote:
>
> The AVX512DQ patterns lacking a Cpu64 attribute made the memory operand
> forms accepted even outside of 64-bit mode, and this even without any
> {evex} pseudo-prefix (otherwise one could argue that this is an attempt
> to follow one possible, albeit somewhat odd, interpretation of the SDM
> wording to this effect).
>
> For consistency between the various involved templates drop the
> * (now) unnecessary IgnoreSize attributes
> * unnecessary (due to VexW1) Size64 attributes from VEX encoded forms
> * redundant (with Reg64) Qword operand attributes
> uniformly.
>
> gas/
> 2020-01-XX  Jan Beulich  <jbeulich@suse.com>
>
>         * testsuite/gas/i386/avx512dq-inval.l,
>         testsuite/gas/i386/avx512dq-inval.s: New.
>         * testsuite/gas/i386/i386.exp: Run new test.
>
> opcodes/
> 2020-01-XX  Jan Beulich  <jbeulich@suse.com>
>
>         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
>         Size64 from and use VexW1 on SSE2AVX forms.
>         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
>         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
>         * i386-tbl.h: Re-generate.
>

OK.

Thanks.

-- 
H.J.