[PATCH] x86: Mark cvtpi2ps and cvtpi2pd as MMX

[H.J. Lu]

On Wed, Feb 19, 2020 at 6:19 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 19.02.2020 15:09, H.J. Lu wrote:
> > On Wed, Feb 19, 2020 at 5:53 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>
> >> On 19.02.2020 14:46, H.J. Lu wrote:
> >>> On Wed, Feb 19, 2020 at 5:40 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>>>
> >>>> On 19.02.2020 14:14, H.J. Lu wrote:
> >>>>> On Wed, Feb 19, 2020 at 5:04 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>>>>> On 19.02.2020 13:58, H.J. Lu wrote:
> >>>>>>> --- a/gas/config/tc-i386.c
> >>>>>>> +++ b/gas/config/tc-i386.c
> >>>>>>> @@ -8636,7 +8636,9 @@ output_insn (void)
> >>>>>>>       x86_feature_2_used |= GNU_PROPERTY_X86_FEATURE_2_X87;
> >>>>>>>        if (i.has_regmmx
> >>>>>>>         || i.tm.base_opcode == 0xf77 /* emms */
> >>>>>>> -       || i.tm.base_opcode == 0xf0e /* femms */)
> >>>>>>> +       || i.tm.base_opcode == 0xf0e /* femms */
> >>>>>>> +       || i.tm.base_opcode == 0xf2a /* cvtpi2ps */
> >>>>>>> +       || i.tm.base_opcode == 0x660f2a /* cvtpi2pd */)
> >>>>>>
> >>>>>> While for the former I agree, the latter - as pointed out
> >>>>>> elsewhere - does explicitly _not_ switch into MMX mode when
> >>>>>> the source operand is in memory.
> >>>>>
> >>>>> They are still MMX instructions even with memory operand.
> >>>>
> >>>> Not exactly, see CVTPI2PD's description in the SDM.
> >>>
> >>> They are MMX in term of pure SSE.
> >>
> >> As per your suggested doc patch "pure SSE" means "not touching MMX
> >> registers or state". This is the case for CVTPI2PD.
> >
> > I will exclude cvtpi2ps and cvtpi2pd explicitly.
>
> Okay, this would clarify what "pure SSE" means. My next objection
> then is to make a connection between "pure SSE" and the feature
> used property. There, as made pretty clear by my earlier inquiry
> about the intentions of this feature tracking, things should be
> really tied to hardware behavior. I.e. "not touching MMX registers
> or state" ==> MMX feature not recorded as being used. No
> exceptions for any insns.
>

Intention is to treat cvtpi2ps and cvtpi2pd as MMX.


-- 
H.J.