[PATCH] x86/Intel: improve diagnostics for ambiguous VCVT* operands

[H.J. Lu]

On Fri, Feb 14, 2020 at 4:56 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> Conversions which shrink element size and which have a memory source
> can't be disambiguated between their 128- and 256-bit variants by
> looking at the register operand. "operand size mismatch", however, is a
> pretty misleading diagnostic. Generalize the logic introduced for
> VFPCLASSP{S,D} such that, with suitable similar adjustments to the
> respective templates, it'll cover these cases too.
>
> For VCVTNEPS2BF16 also fold the two previously separate AVX512VL
> templates to achieve the intended effect. This is then also accompanied
> by a respective addition to the inval-avx512f testcase.
>
> gas/
> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>
>
>         PR gas/6518
>         * config/tc-i386.c (process_suffix): Re-work Intel-syntax
>         [XYZ]MMWord memory operand ambiguity recognition logic (largely
>         re-indentation).
>         * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
>         cases.
>         * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
>         * testsuite/gas/i386/avx512dq-inval.l,
>         testsuite/gas/i386/inval-avx.l,
>         testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
>         * testsuite/gas/i386/avx512vl-ambig.s,
>         testsuite/gas/i386/avx512vl-ambig.l: New.
>         * testsuite/gas/i386/i386.exp: Run new test.
>
> opcodes/
> 2020-02-XX  Jan Beulich  <jbeulich@suse.com>
>
>         PR gas/6518
>         * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
>         vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
>         into Intel syntax instance (with Unpsecified) and AT&T one
>         (without).
>         (vcvtneps2bf16): Likewise, along with folding the two so far
>         separate ones.
>         * i386-tbl.h: Re-generate.
>

OK.

Thanks.

-- 
H.J.