[PATCH v5 0/5] x86: operand size handling improvements

[Jan Beulich]

The main goal continues to be better consistency in the handling of insn
operands, i.e. in particular less unexpected behavior when deducing how
things would behave from observations with one (set of) insn(s) or
operand(s) towards other constructs.

1: x86: also disallow non-byte/-word registers with byte/word suffix
2: x86: move certain MOVSX/MOVZX tests
3: x86: replace adhoc (partly wrong) ambiguous operand checking for MOVSX/MOVZX
4: x86: correct VFPCLASSP{S,D} operand size handling
5: x86-64: Intel64 adjustments for insns dealing with far pointers

v5 is simply for re-basing over commits that have gone in since v4 was
sent.

Jan