[PATCH v2] CSKY: Support two operands form for bloop.

[Lifang Xia]

I added the changelog and merged.

Lifang Xia

在 2020/8/21 16:17, Cooper Qu 写道:
> gas/
>          * config/tc-csky.c (csky_insn_info): Add member last_isize.
>          (md_assemble): Assign value to csky_insn.last_isize.
>          * testsuite/gas/csky/enhance_dsp.d: Test bloop's two operands form.
>          * testsuite/gas/csky/enhance_dsp.s: Likewise.
>
> opcodes/
>          * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
>
> ---
>   gas/config/tc-csky.c                 | 22 +++++++++++++++++++++-
>   gas/testsuite/gas/csky/enhance_dsp.d |  1 +
>   gas/testsuite/gas/csky/enhance_dsp.s |  1 +
>   opcodes/csky-opc.h                   | 11 +++++++----
>   4 files changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/gas/config/tc-csky.c b/gas/config/tc-csky.c
> index d56bcc222a3..49a52d442a0 100644
> --- a/gas/config/tc-csky.c
> +++ b/gas/config/tc-csky.c
> @@ -272,6 +272,7 @@ struct csky_insn_info
>     struct csky_macro_info *macro;
>     /* Insn size for check_literal.  */
>     unsigned int isize;
> +  unsigned int last_isize;
>     /* Max size of insn for relax frag_var.  */
>     unsigned int max;
>     /* Indicates which element is in csky_opcode_info op[] array.  */
> @@ -4145,6 +4146,7 @@ md_assemble (char *str)
>   	check_literals (csky_insn.opcode->transfer, csky_insn.max);
>       }
>   
> +  csky_insn.last_isize = csky_insn.isize;
>     insn_reloc = BFD_RELOC_NONE;
>   }
>   
> @@ -6900,7 +6902,8 @@ dsp_work_bloop (void)
>     csky_insn.inst = csky_insn.opcode->op32[0].opcode | (reg << 16);
>     csky_insn.isize = 4;
>   
> -  if (csky_insn.e1.X_op == O_symbol
> +  if (csky_insn.number == 3
> +      && csky_insn.e1.X_op == O_symbol
>         && csky_insn.e2.X_op == O_symbol)
>       {
>   	fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
> @@ -6910,6 +6913,23 @@ dsp_work_bloop (void)
>   		     4, &csky_insn.e2, 1,
>   		     BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4);
>       }
> +  else if (csky_insn.number == 2
> +	   && csky_insn.e1.X_op == O_symbol)
> +    {
> +      fix_new_exp (frag_now, csky_insn.output-frag_now->fr_literal,
> +		   4, &csky_insn.e1, 1,
> +		   BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4);
> +      if (csky_insn.last_isize == 2)
> +	csky_insn.inst |= (0xf << 12);
> +      else if (csky_insn.last_isize != 0)
> +	csky_insn.inst |= (0xe << 12);
> +      else
> +	{
> +	  void *arg = (void *)"bloop can not be the first instruction"\
> +		      "when the end label is not specified.\n";
> +	  csky_show_error (ERROR_UNDEFINE, 0, arg, NULL);
> +	}
> +    }
>   
>     csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
>     return TRUE;
> diff --git a/gas/testsuite/gas/csky/enhance_dsp.d b/gas/testsuite/gas/csky/enhance_dsp.d
> index 431703821f1..eaf91259f8b 100644
> --- a/gas/testsuite/gas/csky/enhance_dsp.d
> +++ b/gas/testsuite/gas/csky/enhance_dsp.d
> @@ -11,6 +11,7 @@ Disassembly of section \.text:
>   \s*[0-9a-f]*:\s*d0038802\s*ldbi.w\s*r2,\s*\(r3\)
>   #...
>   \s*[0-9a-f]*:\s*e9c20ffa\s*bloop\s*r2,\s*0x0,\s*0xc.*
> +\s*[0-9a-f]*:\s*e9c2eff8\s*bloop\s*r2,\s*0x0,\s*0xc.*
>   \s*[0-9a-f]*:\s*d0038c02\s*pldbi.d\s*r2,\s*\(r3\)
>   \s*[0-9a-f]*:\s*d0039002\s*ldbi.hs\s*r2,\s*\(r3\)
>   \s*[0-9a-f]*:\s*d0039402\s*ldbi.bs\s*r2,\s*\(r3\)
> diff --git a/gas/testsuite/gas/csky/enhance_dsp.s b/gas/testsuite/gas/csky/enhance_dsp.s
> index 0491a53e32b..755235dab3a 100644
> --- a/gas/testsuite/gas/csky/enhance_dsp.s
> +++ b/gas/testsuite/gas/csky/enhance_dsp.s
> @@ -7,6 +7,7 @@ hello:
>       ldbi.w r2, (r3)
>   .loop_end:
>       bloop r2, .loop_start, .loop_end
> +    bloop r2, .loop_start
>       pldbi.d r2, (r3)
>       ldbi.hs r2, (r3)
>       ldbi.bs r2, (r3)
> diff --git a/opcodes/csky-opc.h b/opcodes/csky-opc.h
> index bb35fe1f86e..6dcf742e482 100644
> --- a/opcodes/csky-opc.h
> +++ b/opcodes/csky-opc.h
> @@ -4675,13 +4675,16 @@ const struct csky_opcode csky_v2_opcodes[] =
>   #define _RELAX      0
>   
>       /* The followings are enhance DSP instructions.  */
> -    OP32_WITH_WORK ("bloop",
> -		    OPCODE_INFO3 (0xe9c00000,
> +    DOP32_WITH_WORK ("bloop",
> +		     OPCODE_INFO3 (0xe9c00000,
>   				  (16_20, AREG, OPRND_SHIFT_0_BIT),
>   				  (0_11, BLOOP_OFF12b, OPRND_SHIFT_1_BIT),
>   				  (12_15, BLOOP_OFF4b, OPRND_SHIFT_1_BIT)),
> -		    CSKY_ISA_DSP_ENHANCE,
> -		    dsp_work_bloop),
> +		     OPCODE_INFO2 (0xe9c00000,
> +				  (16_20, AREG, OPRND_SHIFT_0_BIT),
> +				  (0_11, BLOOP_OFF12b, OPRND_SHIFT_1_BIT)),
> +		     CSKY_ISA_DSP_ENHANCE,
> +		     dsp_work_bloop),
>       /* The followings are ld/st instructions.  */
>       OP32 ("ldbi.b",
>   	  OPCODE_INFO2 (0xd0008000,