Add support for Intel SERIALIZE instructions

[Cui, Lili]

> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Thursday, April 2, 2020 2:33 PM
> To: Cui, Lili <lili.cui@intel.com>
> Cc: binutils@sourceware.org; Zhang, Annita <annita.zhang@intel.com>; Liu,
> Hongtao <hongtao.liu@intel.com>; Lu, Hongjiu <hongjiu.lu@intel.com>; Xiao,
> Wei3 <wei3.xiao@intel.com>
> Subject: Re: Add support for Intel SERIALIZE instructions
> 
> On 02.04.2020 06:01, Cui, Lili via Binutils wrote:
> > --- a/opcodes/i386-opc.tbl
> > +++ b/opcodes/i386-opc.tbl
> > @@ -4076,3 +4076,9 @@ mcommit, 0, 0xf30f01fa, None, 3, CpuMCOMMIT,
> > No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_
> > rdpru, 0, 0x0f01fd, None, 3, CpuRDPRU,
> > No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }  // RDPRU
> > instruction end
> > +
> > +//SERIALIZE instruction
> > +
> > +serialize, 0, 0x0f01e8, None, 3, CpuSERIALIZE,
> > +No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
> > +
> > +//SERIALIZE instruction end
> 
> Like in the other patch you sent, and like visible in context, please have a
> blank after each of the // . Also it looks like only one of the two patches will
> apply as is, the other will need rebasing over the one going in first.
> 
> Jan

Hi, Jan 

I changed format as you mentioned. I will rebase and test the second branch after the first one merged into upstream, thanks .

// RDPRU instruction end
+
+// SERIALIZE instruction.
+
+serialize, 0, 0x0f01e8, None, 3, CpuSERIALIZE, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
+
+// SERIALIZE instruction end.

Lili

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