[PATCH] x86/Intel: correct MOVSD and CMPSD handling

[H.J. Lu]

On Fri, Oct 4, 2019 at 12:45 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> First and foremost the EsSeg attribute was misplaced for CMPSD. Then
> both it and MOVSD were lacking Dword on both of their operands.
> Finally string insns with multiple operands and requiring use of ES:
> had the wrong operand number reported in the diagnostic.
>
> gas/
> 2019-10-04  Jan Beulich  <jbeulich@suse.com>
>
>         * config/tc-i386.c (check_string): Make reported operand number
>         depend on Intel syntax.
>         * testsuite/gas/i386/intel-cmps.s,
>         testsuite/gas/i386/intel-cmps32.d,
>         testsuite/gas/i386/intel-cmps64.d: New.
>         * testsuite/gas/i386/i386.exp: Run new tests.
>         * testsuite/gas/i386/intel-movs.s: Extend.
>         * testsuite/gas/i386/intel-movs32.d,
>         testsuite/gas/i386/intel-movs64.d: Adjust expectations.
>         * testsuite/gas/i386/string-bad.l: Tighten expectations.
>
> opcodes/
> 2019-10-04  Jan Beulich  <jbeulich@suse.com>
>
>         * opcodes/i386-opc.tbl (movsd): Add Dword and IgnoreSize.
>         (cmpsd): Likewise. Move EsSeg to other operand.
>         * opcodes/i386-tbl.h: Re-generate.
>

This breaks:

[hjl@gnu-skx-1 build-x86_64-linux]$ cat x.s
.code16
rep; movsd
[hjl@gnu-skx-1 build-x86_64-linux]$ gcc -c -m32 x.s
[hjl@gnu-skx-1 build-x86_64-linux]$ objdump -dw -Mi8086 x.o

x.o:     file format elf32-i386


Disassembly of section .text:

00000000 <.text>:
   0: f3 66 a5              rep movsl %ds:(%si),%es:(%di)
[hjl@gnu-skx-1 build-x86_64-linux]$ gcc -c -m32 x.s -B/bin/
[hjl@gnu-skx-1 build-x86_64-linux]$ objdump -dw -Mi8086 x.o

x.o:     file format elf32-i386


Disassembly of section .text:

00000000 <.text>:
   0: f3 a5                rep movsw %ds:(%si),%es:(%di)  <<<<<<< This is wrong.
[hjl@gnu-skx-1 build-x86_64-linux]$

H.J.