[PATCH, binutils, Arm] <spec_reg> changes for VMRS and VMSR instructions for Armv8.1-M Mainline

[Sudakshina Das]

Hi

This patch makes changes to the <spec_reg> operand for VMRS and VMSR 
instructions as per the Armv8.1-M Mainline.
New <spec_reg> options to support are:

0b0010: FPSCR_nzcvqc, access to FPSCR condition and saturation flags.
0b1100: VPR, privileged only access to the VPR register.
0b1101: P0, access to VPR.P0 predicate fields
0b1110: FPCXT_NS, enables saving and restoring of Non-secure floating 
point context.
0b1111: FPCXT_S, enables saving and restoring of Secure floating point 
context.

Testing: Added new test for the valid instruction operands. Testsuite 
shows no regression when run for arm-none-eabi targets.

Thanks
Sudi


ChangeLog entries are as follows :

*** gas/ChangeLog ***

2019-xx-xx  Sudakshina Das  <sudi.das@arm.com>

     * config/tc-arm.c (parse_operands): Update case OP_RVC to
     parse p0 and P0.
     (do_vmrs): Add checks for valid operands with respect to
     cpu and fpu options.
     (do_vmsr): Likewise.
     (reg_names): New reg_names for FPSCR_nzcvqc, VPR, FPCXT_NS
     and FPCXT_S.
     * testsuite/gas/arm/armv8_1-m-spec-reg.d: New.
     * testsuite/gas/arm/armv8_1-m-spec-reg.s: New.
     * testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d: New.
     * testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d: New.
     * testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d: New.
     * testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l: New.
     * testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l: New.
     * testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l: New.
     * testsuite/gas/arm/vfp1xD.d: Updated to allow new valid values.
     * testsuite/gas/arm/vfp1xD_t2.d: Likewise.

*** opcodes/ChangeLog ***

2019-xx-xx  Sudakshina Das  <sudi.das@arm.com>

     * arm-dis.c (coprocessor_opcodes): New instructions for VMRS
     and VMSR with the new operands.
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