[PATCH, committed] Update printing of ppc optional operands during disassembly

[Peter Bergner]

The current behavior for ppc when disassembling an instruction, is to either
print all its optional operands or none, depending on if all of the optional
operands have their default values or not.  The following patch changes that
behavior slightly, in that now we print every optional operand up to the
last optional operand that does not have its default value.  We therefore now
skip printing the right most optional operands that have their default values.

Committed.

Peter


opcodes/
	* ppc-dis.c (skip_optional_operands): Change return type and returns.
	(print_insn_powerpc) <skip_optional>: Change type.
	Call skip_optional_operands if we have not skipped any operands.
gas/
	* testsuite/gas/ppc/476.d: Update expected output.
	* testsuite/gas/ppc/power6.d: Likewise.


diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index cb10b239c2..d9ae42a3d0 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -479,7 +479,7 @@ operand_value_powerpc (const struct powerpc_operand *operand,
 
 /* Determine whether the optional operand(s) should be printed.  */
 
-static int
+static bfd_boolean
 skip_optional_operands (const unsigned char *opindex,
 			uint64_t insn, ppc_cpu_t dialect)
 {
@@ -490,7 +490,7 @@ skip_optional_operands (const unsigned char *opindex,
     {
       operand = &powerpc_operands[*opindex];
       if ((operand->flags & PPC_OPERAND_NEXT) != 0)
-	return 0;
+	return FALSE;
       if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 	{
 	  /* Negative count is used as a flag to extract function.  */
@@ -498,11 +498,11 @@ skip_optional_operands (const unsigned char *opindex,
 	  if (operand_value_powerpc (operand, insn, dialect)
 	      != ppc_optional_operand_value (operand, insn, dialect,
 					     num_optional))
-	    return 0;
+	    return FALSE;
 	}
     }
 
-  return 1;
+  return TRUE;
 }
 
 /* Find a match for INSN in the opcode table, given machine DIALECT.  */
@@ -731,7 +731,7 @@ print_insn_powerpc (bfd_vma memaddr,
 	need_7spaces = 7,
 	need_paren
       } op_separator;
-      int skip_optional;
+      bfd_boolean skip_optional;
       int spaces;
 
       (*info->fprintf_func) (info->stream, "%s", opcode->name);
@@ -742,7 +742,7 @@ print_insn_powerpc (bfd_vma memaddr,
 
       /* Now extract and print the operands.  */
       op_separator = spaces;
-      skip_optional = -1;
+      skip_optional = FALSE;
       for (opindex = opcode->operands; *opindex != 0; opindex++)
 	{
 	  int64_t value;
@@ -753,9 +753,8 @@ print_insn_powerpc (bfd_vma memaddr,
 	     then don't print any of them.  */
 	  if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
 	    {
-	      if (skip_optional < 0)
-		skip_optional = skip_optional_operands (opindex, insn,
-							dialect);
+	      if (!skip_optional)
+		skip_optional = skip_optional_operands (opindex, insn, dialect);
 	      if (skip_optional)
 		continue;
 	    }
diff --git a/gas/testsuite/gas/ppc/476.d b/gas/testsuite/gas/ppc/476.d
index d9df9ca43e..7818b86b13 100644
--- a/gas/testsuite/gas/ppc/476.d
+++ b/gas/testsuite/gas/ppc/476.d
@@ -322,11 +322,11 @@ Disassembly of section \.text:
  4e0:	(fc 0c 55 8e|8e 55 0c fc) 	mtfsf   6,f10
  4e4:	(fc 0c 55 8e|8e 55 0c fc) 	mtfsf   6,f10
  4e8:	(fc 0d 55 8e|8e 55 0d fc) 	mtfsf   6,f10,0,1
- 4ec:	(fe 0c 55 8e|8e 55 0c fe) 	mtfsf   6,f10,1,0
+ 4ec:	(fe 0c 55 8e|8e 55 0c fe) 	mtfsf   6,f10,1
  4f0:	(fc 0c 5d 8f|8f 5d 0c fc) 	mtfsf\.  6,f11
  4f4:	(fc 0c 5d 8f|8f 5d 0c fc) 	mtfsf\.  6,f11
  4f8:	(fc 0d 5d 8f|8f 5d 0d fc) 	mtfsf\.  6,f11,0,1
- 4fc:	(fe 0c 5d 8f|8f 5d 0c fe) 	mtfsf\.  6,f11,1,0
+ 4fc:	(fe 0c 5d 8f|8f 5d 0c fe) 	mtfsf\.  6,f11,1
  500:	(ff 00 01 0c|0c 01 00 ff) 	mtfsfi  6,0
  504:	(ff 00 01 0c|0c 01 00 ff) 	mtfsfi  6,0
  508:	(ff 00 01 0c|0c 01 00 ff) 	mtfsfi  6,0
diff --git a/gas/testsuite/gas/ppc/power6.d b/gas/testsuite/gas/ppc/power6.d
index 23978611eb..8f74265731 100644
--- a/gas/testsuite/gas/ppc/power6.d
+++ b/gas/testsuite/gas/ppc/power6.d
@@ -58,8 +58,8 @@ Disassembly of section \.text:
   c0:	(fc 0c 5d 8f|8f 5d 0c fc) 	mtfsf.  6,f11
   c4:	(fc 0d 55 8e|8e 55 0d fc) 	mtfsf   6,f10,0,1
   c8:	(fc 0d 5d 8f|8f 5d 0d fc) 	mtfsf.  6,f11,0,1
-  cc:	(fe 0c 55 8e|8e 55 0c fe) 	mtfsf   6,f10,1,0
-  d0:	(fe 0c 5d 8f|8f 5d 0c fe) 	mtfsf.  6,f11,1,0
+  cc:	(fe 0c 55 8e|8e 55 0c fe) 	mtfsf   6,f10,1
+  d0:	(fe 0c 5d 8f|8f 5d 0c fe) 	mtfsf.  6,f11,1
   d4:	(ff 00 01 0c|0c 01 00 ff) 	mtfsfi  6,0
   d8:	(ff 00 f1 0d|0d f1 00 ff) 	mtfsfi. 6,15
   dc:	(ff 00 01 0c|0c 01 00 ff) 	mtfsfi  6,0