[PATCH][Binutils][AArch64] Fix AArch64 disassembler mapping symbol search

[Tamar Christina]

Hi All,

My previous patch for AArch64 was not enough to catch all the cases where
disassembling an out-of-order section could go wrong.  It had missed the case
DATA sections could be incorrectly disassembled as TEXT.

Out of order here refers to an object file where sections are not listed in a
monotonic increasing VMA order.

The ELF ABI for AArch64 [1] specifies the following for mapping symbols:

  1) A text section must always have a corresponding mapping symbol at it's
     start.
  2) Data sections do not require any mapping symbols.
  3) The range of a mapping symbol extends from the address it starts on up to
     the next mapping symbol (exclusive) or section end (inclusive).

However there is no defined order between a symbol and it's corresponding
mapping symbol in the symbol table.  This means that while in general we look
up for a corresponding mapping symbol, we have to make at least one check of
the symbol below the address being disassembled.

When disassembling different PCs within the same section, the search for mapping
symbol can be cached somewhat.  We know that the mapping symbol corresponding to
the current PC is either the previous one used, or one at the same address as
the current PC.

However this optimization and mapping symbol search must stop as soon as we
reach the end or start of the section.  Furthermore if we're only disassembling
a part of a section, the search is a allowed to search further than the current
chunk, but is not allowed to search past it (The mapping symbol if there, must
be at the same address, so in practice we usually stop at PC+4).

lastly, since only data sections don't require a mapping symbol the default
mapping type should be DATA and not INSN as previously defined, however if the
binary has had all its symbols stripped than this isn't very useful.  To fix this
we determine the default based on the section flags.  This will allow the
disassembler to be more useful on stripped binaries.  If there is no section than
we assume you to be disassembling INSN.

[1] https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4#aaelf64-section4-5-4

build on native hardware and regtested on
  aarch64-none-elf, aarch64-none-elf (32 bit host),
  aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host)

Cross-compiled and regtested on
  aarch64-none-linux-gnu, aarch64_be-none-linux-gnu

and no issues (checked ld, gas and binutils).

Ok for master? and for backport to binutils-2.32?

Thanks,
Tamar

binutils/ChangeLog:

2019-03-07  Tamar Christina  <tamar.christina@arm.com>

	* testsuite/binutils-all/aarch64/in-order.d: New test.
	* testsuite/binutils-all/aarch64/out-of-order.d: Disassemble data as
	well.

opcodes/ChangeLog:

2019-03-07  Tamar Christina  <tamar.christina@arm.com>

	* aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
	order.

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