C.ADDI x0, 4: illegal instruction ?
Thu Jun 27 20:10:00 GMT 2019
On Wed, Jun 26, 2019 at 11:34 PM Palmer Dabbelt <email@example.com> wrote:
> The ISA manual says
> C.ADDI adds the non-zero sign-extended 6-bit immediate to the value in register
> rd then writes the result to rd. C.ADDI expands into addi rd, rd, nzimm[5:0].
> C.ADDI is only valid when rd = x0. The code point with both rd=x0 and nzimm=0
> encodes the C.NOP instruction; the remaining code points with either rd=x0 or
> nzimm=0 encode HINTs. C.ADDIW is an RV64C/RV128C-only instruction that
> performs the same computation but pro-
This text changed yesterday by the way, because it was ambiguous.
This is the c.addi documentation, stating that rd=x0 is a hint,
thereby clearly implying that "c.addi x0,4" is a valid hint
instruction. The text is now changed to mention that only nzimm=0 is
a hint, and the rd=x0 hint text was moved to the c.nop documentation.
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