Linker support for Harvard Architecture
Wed Jul 31 11:59:00 GMT 2019
I am trying to support a processor that contains 2 address spaces(one for code and one for data).
The current implementation of the Linker prevents me from mapping a code section and a data section to the same address.
I get the following error:
section .data.internal LMA [0000000000000000,0000000000002343] overlaps section .text LMA [0000000000000000,00000000000002ff]
Is there a known way to support this kind of memory configuration(without using overlays)?
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