[PATCH, BINUTILS, AArch64, 3/3] Update encodings for stg, st2g, stzg and st2zg.

Kyrill Tkachov kyrylo.tkachov@foss.arm.com
Fri Jan 25 09:34:00 GMT 2019


Hi

This patch is part of a series of patches to introduce a few changes to the
Armv8.5-A Memory Tagging Extension. This patch updates the st*g instructions
to use a previously reserved field for a new register operand. Thus the
new versions of the instructions are as follows:

- STG Xt, [<Xn|SP>, #<simm>]
- STG Xt, [<Xn|SP>, #<simm>]!
- STG Xt, [<Xn|SP>], #<simm>
- STZG Xt, [<Xn|SP>, #<simm>]
- STZG Xt, [<Xn|SP>, #<simm>]!
- STZG Xt, [<Xn|SP>], #<simm>
- ST2G Xt, [<Xn|SP>, #<simm>]
- ST2G Xt, [<Xn|SP>, #<simm>]!
- ST2G Xt, [<Xn|SP>], #<simm>
- STZ2G Xt, [<Xn|SP>, #<simm>]
- STZ2G Xt, [<Xn|SP>, #<simm>]!
- STZ2G Xt, [<Xn|SP>], #<simm>

For ease of review I have not added the regenerated files in the patch. I
will add those in my final commit.

Builds and reg tests all pass on aarch64-none-elf.

Is this ok for trunk?

Thanks
Sudi

*** gas/ChangeLog ***

2019-01-25  Sudakshina Das  <sudi.das@arm.com>

     * config/tc-aarch64.c (warn_unpredictable_ldst): Exempt
     stg, st2g, stzg and stz2g from Xt == Xn with writeback warning.
     * testsuite/gas/aarch64/armv8_5-a-memtag.d: Change tests for
     stg, stzg, st2g and stz2g.
     * testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
     * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
     * testsuite/gas/aarch64/illegal-memtag.s: Likewise.

*** opcodes/ChangeLog ***

2019-01-25  Sudakshina Das  <sudi.das@arm.com>

     * aarch64-tbl.h (QL_LDST_AT): Update macro.
     (aarch64_opcode): Change encoding for stg, stzg
     st2g and st2zg.
     * aarch64-asm-2.c: Regenerated.
     * aarch64-dis-2.c: Regenerated.
     * aarch64-opc-2.c: Regenerated.
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