asan: score: global-buffer-overflow

[Alan Modra]

I'm flying blind here, not having an s+core s3 insn set reference,
but this seems reasonably obvious from what is done by the assembler.
s3_do16_rpop does some mixing of imm and reg values to place in the
rpop reg field, but I'm not going to try to fix the disassembly
there.

	* score-dis.c (print_insn_score16): Move rpush/rpop imm field
	value adjustment so that it doesn't affect reg field too.

diff --git a/opcodes/score-dis.c b/opcodes/score-dis.c
index 69c801b252..74a1f1d932 100644
--- a/opcodes/score-dis.c
+++ b/opcodes/score-dis.c
@@ -954,15 +954,6 @@ print_insn_score16 (bfd_vma pc, struct disassemble_info *info, long given)
                               reg = given >> bitstart;
                               reg &= (2 << (bitend - bitstart)) - 1;
 
-                              /* Check rpush rd, 0 and rpop! rd, 0.
-                                 If reg = 0, then set to 32.  */
-                              if (((given & 0x00007c00) == 0x00006c00
-                                    || (given & 0x00007c00) == 0x00006800)
-                                  && reg == 0)
-                                {
-                                  reg = 32;
-                                }
-
                               switch (*c)
                                 {
                                 case 'R':
@@ -972,6 +963,13 @@ print_insn_score16 (bfd_vma pc, struct disassemble_info *info, long given)
                                   func (stream, "%s", score_regnames[reg]);
                                   break;
                                 case 'd':
+				  /* Check rpush rd, 0 and rpop! rd, 0.
+				     If 0, then print 32.  */
+				  if (((given & 0x00007c00) == 0x00006c00
+				       || (given & 0x00007c00) == 0x00006800)
+				      && reg == 0)
+				    reg = 32;
+
                                   if (*(c + 1) == '\0')
                                     func (stream, "%ld", reg);
                                   else

-- 
Alan Modra
Australia Development Lab, IBM