[PATCH 03/10] x86: produce suffix in suffix-always mode for {,V}CVT{,T}S{S,D}2SI

Jan Beulich jbeulich@suse.com
Wed Aug 7 07:30:00 GMT 2019


On 06.08.2019 21:41,  H.J. Lu  wrote:
> On Tue, Aug 6, 2019 at 7:25 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> Not doing so is simple inconsistent - the mode is specifically intended
>> to emit suffixes wherever applicable.
>>
>> gas/
>> 2019-08-XX  Jan Beulich  <jbeulich@suse.com>
>>
>>          * testsuite/gas/i386/ilp32/x86-64-simd-suffix.d,
>>          testsuite/gas/i386/simd-suffix.d,
>>          testsuite/gas/i386/x86-64-simd-suffix.d: Adjust expectations.
>>
>> opcodes/
>> 2019-08-XX  Jan Beulich  <jbeulich@suse.com>
>>
>>          * i386-dis-evex-prefix.h (vcvtss2si, vcvtsd2si, vcvttss2si,
>>          vcvttsd2si, vcvtss2usi, vcvtsd2usi, vcvttss2usi, and
>>          vcvttsd2usi): Add S suffix.
>>          i386-dis.c (prefix_table): Add S suffix to cvtss2si, cvtsd2si,
>>          cvttss2si, cvttsd2si, vcvtss2si, vcvtsd2si, vcvttss2si, and
>>          vcvttsd2si.
>>
> 
> For vector instructions, we output suffix only when there is an
> ambiguity.  Are there ambiguities in these instructions?

I think we'd been there before, and as you can see this is now the
second time that this inconsistency has made me invest time in
fixing it. There are no ambiguities here, just like there aren't
on various non-SIMD insns that get a suffix in suffix-always mode.

May I ask where exactly it is clearly and prominently stated that
such (pseudo-)SIMD instructions should not _ever_ get suffixes
emitted for them? This is especially with the assembler accepting
suffixes for at least some of them (in which case, in suffix-
always mode, I'd consider it a legitimate expectation that the
input suffixes should then also be reflected as output ones). And
I think it goes without saying that this "some of them" (assuming
I recall correctly that this is the case) is yet another anomaly
that ought to be fixed (and iirc I had submitted a patch to this
effect before).

Jan



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