[PATCH, binutils, ARM, 0/16] Add support for Armv8.1-M Mainline

[Andre Vieira (lists)]

Hello,

This is a patch series to implement support for Armv8.1-M Mainline. The 
specifications for the Armv8.1-M Mainline can be found in 
https://developer.arm.com/docs/ddi0553/latest

This patch series does not cover M-profile Vector Extension (MVE) 
support, this will be implemented in a follow-up patch series.

Andre Vieira (16):
[PATCH, binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI
[PATCH, GAS, ARM, 2/16] Add architecture extension support for Armv8.1-M 
Mainline
[PATCH, binutils, ARM, 3/16] BF insns infrastructure with new 
bfd_reloc_code_real for fallback branch
[PATCH, binutils, ARM, 4/16] BF insns infrastructure with array of 
relocs in struct arm_it
[PATCH, binutils, ARM, 5/16] BF insns infrastructure with new global 
reloc R_ARM_THM_BF16
[PATCH, binutils, ARM, 6/16] New BF instruction for Armv8.1-M Mainline
[PATCH, binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M 
Mainline
[PATCH, binutils, ARM, 8/16] BFL infrastructure with new global reloc 
R_ARM_THM_BF18
[PATCH, binutils, ARM, 9/16] New BFL instruction for Armv8.1-M Mainline
[PATCH, binutils, ARM, 10/16] BFCSEL infrastructure with new global 
reloc R_ARM_THM_BF12
[PATCH, binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline
[PATCH, binutils, ARM, 12/16] Scalar Low Overhead loop instructions for 
Armv8.1-M Mainline
[PATCH, binutils, ARM, 13/16] Add support for CLRM
[PATCH, opcodes, ARM, 14/16] Add mode availability to coprocessor table 
entries
[PATCH, binutils, ARM, 15/16] Add support for VSCCLRM
[PATCH, binutils, ARM, 16/16] Add support to VLDR and VSTR of system 
registers