[PATCH] i386: Update VexW field for VEX instructions

[H.J. Lu]

On Thu, Sep 13, 2018 at 2:52 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 13.09.18 at 00:16, <hjl.tools@gmail.com> wrote:
>> --- a/opcodes/i386-opc.tbl
>> +++ b/opcodes/i386-opc.tbl
>> @@ -941,10 +941,10 @@ emms, 0, 0xf77, None, 2, CpuMMX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSu
>>  // copying between Reg64/Mem64 and RegXMM/RegMMX, as is mandated by Intel's
>>  // spec). AMD's spec, having been in existence for much longer, failed to
>>  // recognize that and specified movd for 32- and 64-bit operations.
>
> This comment suggests to me that ...
>
>> -movd, 2, 0x666e, None, 1, CpuAVX,
>> Modrm|Vex=3|VexOpcode=0|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No
>> _ldSuf|SSE2AVX, { Reg32|Dword|Unspecified|BaseIndex, RegXMM }
>> -movd, 2, 0x666e, None, 1, CpuAVX|Cpu64,
>> Modrm|Vex=3|VexOpcode=0|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No
>> _ldSuf|Rex64|SSE2AVX, { Reg64|Qword|BaseIndex, RegXMM }
>> -movd, 2, 0x667e, None, 1, CpuAVX,
>> Modrm|Vex=3|VexOpcode=0|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No
>> _ldSuf|SSE2AVX, { RegXMM, Dword|Unspecified|Reg32|BaseIndex }
>> -movd, 2, 0x667e, None, 1, CpuAVX|Cpu64,
>> Modrm|Vex=3|VexOpcode=0|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No
>> _ldSuf|Rex64|SSE2AVX, { RegXMM, Qword|Reg64|BaseIndex }
>> +movd, 2, 0x666e, None, 1, CpuAVX,
>> Modrm|Vex=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_
>> qSuf|No_ldSuf|SSE2AVX, { Reg32|Dword|Unspecified|BaseIndex, RegXMM }
>> +movd, 2, 0x666e, None, 1, CpuAVX|Cpu64,
>> Modrm|Vex=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_
>> qSuf|No_ldSuf|Rex64|SSE2AVX, { Reg64|Qword|BaseIndex, RegXMM }
>
> ... this wants to have VexW=2 (also elsewhere). But with a GPR operand,
> do we need VexW= at all? Iirc VEX.W gets derived from the register size in
> these cases. I'd rather not see new unnecessary attributes added. Hence
> I'd like to ask to restrict this change to just the removal of wrong VexW=.
>

This is what I checked in.  VexW is needed for -mvexwig=[0|1] I am working on.


-- 
H.J.
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