[PATCH, BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Extension

Richard Earnshaw (lists) Richard.Earnshaw@arm.com
Tue Oct 30 09:39:00 GMT 2018


On 09/10/2018 18:23, Sudakshina Das wrote:
> Hi
> 
> This patch is part of the patch series to add support for ARMv8.5-A
> Memory Tagging Extensions.
> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
> Memory Tagging Extension (MTE) is an optional extension to
> ARMv8.5-A and is enabled using the +memtag command line option.
> 
> This patch add support to the Tag generation instructions from
> MTE. These are the following instructions added in this patch:
> - IRG <Xd|SP>, <Xn|SP>{, Xm}
> - ADDG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2>
> - SUBG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2>
> - GMI <Xd>, <Xn|SP>, <Xm>
> 
> where
> <Xd|SP> : Is the 64-bit destination GPR or Stack pointer.
> <Xn|SP> : Is the 64-bit source GPR or Stack pointer.
> <uimm1> : Is the unsigned immediate, a multiple of 16
> in the range 0 to 1008.
> <uimm2> : Is the unsigned immediate, in the range 0 to 15.
> 
> Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
> Added test.
> 
> Is this ok for trunk?
> 
> Thanks
> Sudi
> 
> *** include/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
> 	* opcode/aarch64.h (aarch64_opnd): Add
> 	AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums.
> 
> *** opcodes/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
> 	* aarch64-opc.h (aarch64_field_kind): New FLD_imm4_3.
> 	(OPD_F_SHIFT_BY_4, operand_need_shift_by_four): New.
> 	* aarch64-opc.c (fields): Add entry for imm4_3.
> 	(operand_general_constraint_met_p): Add cases for
> 	AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
> 	(aarch64_print_operand): Likewise.
> 	* aarch64-tbl.h (QL_ADDG): New.
> 	(aarch64_opcode_table): Add addg, subg, irg and gmi.
> 	(AARCH64_OPERANDS): Define UIMM4_ADDG and UIMM10.
> 	* aarch64-asm.c (aarch64_ins_imm): Add case for
> 	operand_need_shift_by_four.
> 	* aarch64-asm-2.c: Regenarated.
> 	* aarch64-dis-2.c: Regenerated.
> 	* aarch64-opc-2.c: Regenerated.
> 
> *** gas/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
> 
> 	* config/tc-aarch64.c (parse_operands): Add switch case for
> 	AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
> 	* testsuite/gas/aarch64/armv8_5-a-mte.s: New.
> 	* testsuite/gas/aarch64/armv8_5-a-mte.d: Likewise.
> 
> 
> 

Urgh!  We really need to get rid of those ridiculous autogenerated files
from the source tree...

Same issue as patch 1 re mte/memtag.

aarch64-opc.c:
+	case AARCH64_OPND_UIMM10:
+	  /* Scaled unsigned 10 bits immediate offset.  */
+	  if (!value_in_range_p (opnd->imm.value, 0, 1008))
+	    {
+	      set_imm_out_of_range_error (mismatch_detail, idx, 0, 1008);
+	      return 0;
+	    }
+	  if (!value_aligned_p (opnd->imm.value, 16))
+	    {
+

Blank line between independent if clauses.

Otherwise OK.

R.



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