[PATCH, BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging Extension

Sudakshina Das sudi.das@arm.com
Tue Oct 9 17:26:00 GMT 2018


Hi

This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
Memory Tagging Extension (MTE) is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.

This patch adds all the system registers that are part of this
extension and are accessible via the MRS/MSR instructions:
- TCO
- TFSRE0_SL1
- TFSR_EL1
- TFSR_EL2
- TFSR_EL3
- TFSR_EL12
- RGSR_EL1
- GCR_EL1
TCO is also accessible with the MSR(immediate) instruction.

Testing done: Builds and reg tests all pass on aarch64-none-linux-gnu.
Added test.

Is this ok for trunk?

Thanks
Sudi

*** opcodes/ChangeLog ***

2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.c (aarch64_sys_regs): New entries for TCO,
	TFSRE0_SL1, TFSR_EL1, TFSR_EL2, TFSR_EL3, TFSR_EL12,
	RGSR_EL1 and GCR_EL1.
	(aarch64_sys_reg_supported_p): New check for above.
	(aarch64_pstatefields): New entry for TCO.
	(aarch64_pstatefield_supported_p): New check for above.

*** gas/ChangeLog ***

2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>

	* testsuite/gas/aarch64/sysreg-4.s: Test TCO, TFSRE0_SL1,
	TFSR_EL1, TFSR_EL2, TFSR_EL3, TFSR_EL12, RGSR_EL1 and
	GCR_EL1 MSR and MRS.
	* testsuite/gas/aarch64/sysreg-4.d: Likewise.
	* testsuite/gas/aarch64/illegal-sysreg-4.l: Likewise.


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