[PATCH] RISC-V: Add .insn support
Wed Mar 7 10:04:00 GMT 2018
Thanks for contributing this patch. I did not thoroughly review the
code, but I like the approach. Jim or Palmer will probably follow up
with additional comments.
I noticed a typo: major opcode 0x6f should be named JAL, not JAR.
(The test case and the documentation also have this typo.)
On Wed, Mar 7, 2018 at 1:15 AM, Kito Cheng <email@example.com> wrote:
> This patch make RISC-V assembler support new directive: .insn, it
> able to write instruction with another form just like s/390's .insn
> Main purpose of this directive is to make people easier to add new
> instruction for experimentation without modify binutils, and it's much
> usable than just use .word to encode instruction.
>  https://sourceware.org/binutils/docs-2.30/as/s390-Directives.html#index-_002einsn-directive_002c-s390
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