[committed] MIPS/LD/testsuite: Add microMIPS lazy binding stub tests
Maciej W. Rozycki
macro@mips.com
Sat Jun 9 00:16:00 GMT 2018
Adapt the existing regular MIPS lazy binding stub tests for microMIPS
code verification. Check both regular and `--insn32' variants.
Correct indentation issues in the conditional updated.
ld/
* testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d: New
test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d: New
test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d: New
test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d: New
test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d: New
test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-7fff.d:
New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-8000.d:
New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-fff0.d:
New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-10000.d:
New test.
* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-2fe80.d:
New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests. Fix
indentation.
---
ld/testsuite/ld-mips-elf/mips-elf.exp | 51 +++++-----
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d | 17 +++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d | 17 +++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d | 15 ++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d | 15 ++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d | 15 ++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-10000.d | 18 +++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-2fe80.d | 18 +++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-7fff.d | 16 +++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-8000.d | 16 +++
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-fff0.d | 16 +++
11 files changed, 192 insertions(+), 22 deletions(-)
binutils-mips-ld-test-umips-stub-dynsym.diff
Index: binutils/ld/testsuite/ld-mips-elf/mips-elf.exp
===================================================================
--- binutils.orig/ld/testsuite/ld-mips-elf/mips-elf.exp 2018-06-09 00:52:35.224571070 +0100
+++ binutils/ld/testsuite/ld-mips-elf/mips-elf.exp 2018-06-09 00:52:52.408824699 +0100
@@ -782,28 +782,35 @@ run_dump_test "hash1b"
run_dump_test "hash1c"
if {[istarget mips*-*-linux*]} {
- # The number of symbols that are always included in the symbol table
- # for these tests. The 2 are:
- #
- # the null symbol entry
- # the .MIPS.stubs section symbol
- set base_syms 2
- foreach dynsym { 7fff 8000 fff0 10000 2fe80 } {
- run_ld_link_tests \
- [list [list \
- "Stub for dynsym 0x$dynsym" \
- "-shared -melf32btsmip -T stub-dynsym-1.ld" "" \
- [concat \
- "-EB -march=mips1 -32 -KPIC" \
- "--defsym base_syms=$base_syms" \
- "--defsym dynsym=0x$dynsym"] \
- [list "stub-dynsym-1.s"] \
- [list [list \
- "objdump" "-dz" \
- "stub-dynsym-1-$dynsym.d"]] \
- "stub-dynsym-1-$dynsym"]]
- }
- }
+ # The number of symbols that are always included in the symbol table
+ # for these tests. The 2 are:
+ #
+ # the null symbol entry
+ # the .MIPS.stubs section symbol
+ set base_syms 2
+ foreach { isa aflag lflag suffix } \
+ { MIPS -march=mips1 "" "" \
+ microMIPS -mmicromips "" -micromips \
+ "microMIPS insn32" "-mmicromips -minsn32" --insn32 \
+ -micromips-insn32 } {
+ foreach dynsym { 7fff 8000 fff0 10000 2fe80 } {
+ run_ld_link_tests \
+ [list [list \
+ "Stub for dynsym 0x$dynsym ($isa)" \
+ "-shared -melf32btsmip -T stub-dynsym-1.ld $lflag" \
+ "" \
+ [concat \
+ "-EB $aflag -32 -KPIC" \
+ "--defsym base_syms=$base_syms" \
+ "--defsym dynsym=0x$dynsym"] \
+ [list "stub-dynsym-1.s"] \
+ [list [list \
+ "objdump" "-dz" \
+ "stub-dynsym$suffix-1-$dynsym.d"]] \
+ "stub-dynsym$suffix-1-$dynsym"]]
+ }
+ }
+}
# For tests which may involve multiple files, use run_ld_link_tests.
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d 2018-06-09 00:52:52.416907390 +0100
@@ -0,0 +1,17 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 0dff move t7,ra
+.*: 41b8 0001 lui t8,0x1
+.*: 45d9 jalr t9
+.*: 5318 0000 ori t8,t8,0x0
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d 2018-06-09 00:52:52.432151832 +0100
@@ -0,0 +1,17 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 0dff move t7,ra
+.*: 41b8 0002 lui t8,0x2
+.*: 45d9 jalr t9
+.*: 5318 fe80 ori t8,t8,0xfe80
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d 2018-06-09 00:52:52.443295565 +0100
@@ -0,0 +1,15 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 0dff move t7,ra
+.*: 45d9 jalr t9
+.*: 3300 7fff li t8,32767
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d 2018-06-09 00:52:52.461502132 +0100
@@ -0,0 +1,15 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 0dff move t7,ra
+.*: 45d9 jalr t9
+.*: 5300 8000 li t8,0x8000
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d 2018-06-09 00:52:52.478951832 +0100
@@ -0,0 +1,15 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 0dff move t7,ra
+.*: 45d9 jalr t9
+.*: 5300 fff0 li t8,0xfff0
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-10000.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-10000.d 2018-06-09 00:52:52.495335918 +0100
@@ -0,0 +1,18 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 001f 7a90 move t7,ra
+.*: 41b8 0001 lui t8,0x1
+.*: 03f9 0f3c jalr t9
+.*: 5318 0000 ori t8,t8,0x0
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-2fe80.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-2fe80.d 2018-06-09 00:52:52.505592853 +0100
@@ -0,0 +1,18 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 001f 7a90 move t7,ra
+.*: 41b8 0002 lui t8,0x2
+.*: 03f9 0f3c jalr t9
+.*: 5318 fe80 ori t8,t8,0xfe80
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-7fff.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-7fff.d 2018-06-09 00:52:52.523053643 +0100
@@ -0,0 +1,16 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 001f 7a90 move t7,ra
+.*: 03f9 0f3c jalr t9
+.*: 3300 7fff li t8,32767
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-8000.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-8000.d 2018-06-09 00:52:52.532276127 +0100
@@ -0,0 +1,16 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 001f 7a90 move t7,ra
+.*: 03f9 0f3c jalr t9
+.*: 5300 8000 li t8,0x8000
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
Index: binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-fff0.d
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ binutils/ld/testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-fff0.d 2018-06-09 00:52:52.543541847 +0100
@@ -0,0 +1,16 @@
+.*: +file format .*mips.*
+
+Disassembly of section \.MIPS\.stubs:
+
+.* <_MIPS_STUBS_>:
+.*: ff3c 8010 lw t9,-32752\(gp\)
+.*: 001f 7a90 move t7,ra
+.*: 03f9 0f3c jalr t9
+.*: 5300 fff0 li t8,0xfff0
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+.*: 0000 0000 nop
+
+Disassembly of section \.text:
+#pass
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