[PATCH] x86-64: correct AVX512F vcvtsi2s{d,s} handling

[H.J. Lu]

On Wed, Jul 18, 2018 at 11:45 PM, Jan Beulich <JBeulich@suse.com> wrote:
> Just like for their AVX counterparts and CVTSI2S{D,S}, a memory source
> here is ambiguous and hence
> - in source files should be qualified with a suitable suffix or operand
>   size specifier (not doing so is an error in Intel mode, and will gain
>   a diagnostic in AT&T mode in the future),
> - in disassembly should be properly suffixed (the Intel operand size
>   specifiers were emitted correctly already).

Did you include the disassembler patch for AT&T mode?

> gas/
> 2018-07-19  Jan Beulich  <jbeulich@suse.com>
>
>         * config/tc-i386.c (check_VecOperands): Handle EVEXLIG when
>         deriving i.memshift.
>         * testsuite/gas/i386/cvtsi2sX.s, testsuite/gas/i386/cvtsi2sX.l:
>         New.
>         * testsuite/gas/i386/i386.exp: Run new test.
>         * testsuite/gas/i386/avx512f.d,
>         testsuite/gas/i386/evex-lig256.d,
>         testsuite/gas/i386/evex-lig512.d,,
>         testsuite/gas/i386/x86-64-avx512f.d,
>         testsuite/gas/i386/x86-64-evex-lig256.d,
>         testsuite/gas/i386/x86-64-evex-lig512.d: Adjust expectations.
>
> opcodes/
> 2018-07-19  Jan Beulich  <jbeulich@suse.com>
>
>         * i386-dis-evex.h (evex_table): Add %LQ to vcvtsi2ss, vcvtsi2sd,
>         vcvtusi2ss, and vcvtusi2sd.
>         * i386-opc.tbl (vcvtsi2sd, vcvtusi2sd, vcvtsi2ss, vcvtusi2ss):
>         Convert AVX512F variants to distinct CpuNo64 and Cpu64 forms.
>         * i386-tbl.h: Re-generate.
>


-- 
H.J.