[PATCH][AArch64][binutils] Add remainder of Em16 restrictions.

[Tamar Christina]

Hi All,

This adds the missing Em16 constraints the rest of the instructions requiring them
and also adds a testcase to test all the instructions so these are checked from
now on.

The Em16 operand constrains the valid registers to the lower 16 registers when used
with a half precision qualifier. 

The list has been cross checked (by hand) through the Arm ARM version Ca.

build on native hardware and regtested on
  aarch64-none-elf, aarch64-none-elf (32 bit host),
  aarch64-none-linux-gnu, aarch64_be-none-linux-gnu

Cross-compiled and regtested on
  aarch64-none-linux-gnu, aarch64_be-none-linux-gnu

and no issues.

Ok for master? and for backport to binutils-2.31?

Thanks,
Tamar

opcodes/
2018-07-09  Tamar Christina  <tamar.christina@arm.com>

	PR binutils/23192
	* aarch64-tbl.h (sqdmlal, sqdmlal2, smlsl, smlsl2, sqdmlsl, sqdmlsl2,
	mul, smull, smull2, sqdmull, sqdmull2, sqdmulh, sqrdmulh, mla, umlal,
	umlal2, mls, umlsl, umlsl2, umull, umull2, sqdmlal, sqdmlsl, sqdmull,
	sqdmulh, sqrdmulh): Use Em16.

gas/
2018-07-09  Tamar Christina  <tamar.christina@arm.com>

	PR binutils/23192
	* testsuite/gas/aarch64/illegal-by-element.s: New.
	* testsuite/gas/aarch64/illegal-by-element.d: New.
	* testsuite/gas/aarch64/illegal-by-element.l: New.

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