[PATCH] [MIPS] Add fix for loongson3 llsc errata

Jiaxun Yang jiaxun.yang@flygoat.com
Fri Jan 26 13:19:00 GMT 2018

在 2018-01-26五的 10:54 +0000,James Cowgill写道:

> I'm interested to know what this errata is. Why do you need the extra
> sync and what does it do?
> Some time ago, I also noticed a kernel patch was submitted to do
> something similar in their atomic routines. The patch also adds a
> sync
> after some sc instructions as well. Is that not necessary?
> https://patchwork.linux-mips.org/patch/16987/
Hi James

I'm not a hardware engineer and also not a loongson stuff so it's hard
for me to say why the errata happen.

I simply translate the errata part of Loongson 3A3000 processor user
manual[1] into English.

There are some strict limitations on loongson processors' ll/sc
instructions. If you don't respect these limitations carefully, it will
cause data corruption.

You should follow following rules when you're using ll/sc instructions.
1: There must be a sync instruction before any ll instruction
2: If there is a jump (such as j, jr or jal) instruction (such as j, jr
or jal) between ll instruction and sc instruction, then the target of
jump instruction must be a sync instruction.

And according to my tests, these limitations are necessary, or system
may freeze during SpinLock.

Jiaxun Yang
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