[PATCH] opcodes/riscv: Hide '.L0 ' fake symbols
Andrew Burgess
andrew.burgess@embecosm.com
Mon Dec 3 16:47:00 GMT 2018
* Andreas Schwab <schwab@linux-m68k.org> [2018-12-03 17:24:40 +0100]:
> On Dez 03 2018, Andrew Burgess <andrew.burgess@embecosm.com> wrote:
>
> > diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
> > index 750d76ad865..36617c4977d 100644
> > --- a/opcodes/disassemble.c
> > +++ b/opcodes/disassemble.c
> > @@ -649,6 +649,11 @@ disassemble_init_for_target (struct disassemble_info * info)
> > #ifdef ARCH_powerpc
> > case bfd_arch_powerpc:
> > #endif
> > +#ifdef ARCH_riscv
> > + case bfd_arch_riscv:
> > + info->symbol_is_valid = riscv_symbol_is_valid;
> > + break;
> > +#endif
> > #ifdef ARCH_rs6000
> > case bfd_arch_rs6000:
> > #endif
>
Thanks for your feedback.
> You are adding code and a break in the middle of two unreleated cases.
> That will break the powerpc case.
Gah! My bad. Apologies for that. I've fixed this below.
> Moreover, there is already another
> use of case bfd_arch_riscv, so this cannot even compile.
Umm, not in my version of master, last commit (before mine)
b570a287cfb. I guess we're both making mistakes today :)
I've included the version of disassmble_init_for_target as I see it
(before my patch) below, so you can confirm this matches what you
see (maybe you do have something different somehow). I see no other
mention of riscv. My patch definitely builds (that's how I generated
the output in the commit message).
Thanks again for your feedback.
Andrew
---
void
disassemble_init_for_target (struct disassemble_info * info)
{
if (info == NULL)
return;
switch (info->arch)
{
#ifdef ARCH_aarch64
case bfd_arch_aarch64:
info->symbol_is_valid = aarch64_symbol_is_valid;
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_arm
case bfd_arch_arm:
info->symbol_is_valid = arm_symbol_is_valid;
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_csky
case bfd_arch_csky:
info->symbol_is_valid = csky_symbol_is_valid;
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_ia64
case bfd_arch_ia64:
info->skip_zeroes = 16;
break;
#endif
#ifdef ARCH_tic4x
case bfd_arch_tic4x:
info->skip_zeroes = 32;
break;
#endif
#ifdef ARCH_mep
case bfd_arch_mep:
info->skip_zeroes = 256;
info->skip_zeroes_at_end = 0;
break;
#endif
#ifdef ARCH_metag
case bfd_arch_metag:
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_m32c
case bfd_arch_m32c:
/* This processor in fact is little endian. The value set here
reflects the way opcodes are written in the cgen description. */
info->endian = BFD_ENDIAN_BIG;
if (! info->insn_sets)
{
info->insn_sets = cgen_bitset_create (ISA_MAX);
if (info->mach == bfd_mach_m16c)
cgen_bitset_set (info->insn_sets, ISA_M16C);
else
cgen_bitset_set (info->insn_sets, ISA_M32C);
}
break;
#endif
#ifdef ARCH_pru
case bfd_arch_pru:
info->disassembler_needs_relocs = TRUE;
break;
#endif
#ifdef ARCH_powerpc
case bfd_arch_powerpc:
#endif
#ifdef ARCH_rs6000
case bfd_arch_rs6000:
#endif
#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
disassemble_init_powerpc (info);
break;
#endif
#ifdef ARCH_wasm32
case bfd_arch_wasm32:
disassemble_init_wasm32 (info);
break;
#endif
#ifdef ARCH_s390
case bfd_arch_s390:
disassemble_init_s390 (info);
break;
#endif
#ifdef ARCH_nds32
case bfd_arch_nds32:
disassemble_init_nds32 (info);
break;
#endif
default:
break;
}
}
---
opcodes/riscv: Hide '.L0 ' fake symbols
The RISC-V assembler generates fake labels with the name '.L0 ' as
part of the debug information (see
gas/config/tc-riscv.h:FAKE_LABEL_NAME).
The problem is that currently, when disassembling an object file, the
output looks like this (this is an example from the GDB testsuite, but
is pretty representative of anything with debug information):
000000000000001e <main>:
1e: 7179 addi sp,sp,-48
20: f406 sd ra,40(sp)
22: f022 sd s0,32(sp)
24: 1800 addi s0,sp,48
0000000000000026 <.L0 >:
26: 87aa mv a5,a0
28: feb43023 sd a1,-32(s0)
2c: fcc43c23 sd a2,-40(s0)
30: fef42623 sw a5,-20(s0)
0000000000000034 <.L0 >:
34: fec42783 lw a5,-20(s0)
38: 0007871b sext.w a4,a5
3c: 678d lui a5,0x3
3e: 03978793 addi a5,a5,57 # 3039 <.LASF30+0x2a9d>
42: 02f71463 bne a4,a5,6a <.L0 >
0000000000000046 <.L0 >:
46: 000007b7 lui a5,0x0
4a: 0007b783 ld a5,0(a5) # 0 <need_malloc>
4e: 6f9c ld a5,24(a5)
0000000000000050 <.L0 >:
50: 86be mv a3,a5
52: 466d li a2,27
54: 4585 li a1,1
56: 000007b7 lui a5,0x0
5a: 00078513 mv a0,a5
5e: 00000097 auipc ra,0x0
62: 000080e7 jalr ra # 5e <.L0 +0xe>
0000000000000066 <.L0 >:
66: 4785 li a5,1
68: a869 j 102 <.L0 >
000000000000006a <.L0 >:
6a: 000007b7 lui a5,0x0
6e: 00078513 mv a0,a5
72: 00000097 auipc ra,0x0
76: 000080e7 jalr ra # 72 <.L0 +0x8>
The frequent repeated '.L0 ' labels are pointless, as they are
non-unique there's no way to match a use of '.L0 ' to its appearence
in the output, so we'd be better off just not printing it at all.
That's what this patch does by defining a 'symbol_is_valid' method for
RISC-V. With this commit, the same disassembly now looks like this:
000000000000001e <main>:
1e: 7179 addi sp,sp,-48
20: f406 sd ra,40(sp)
22: f022 sd s0,32(sp)
24: 1800 addi s0,sp,48
26: 87aa mv a5,a0
28: feb43023 sd a1,-32(s0)
2c: fcc43c23 sd a2,-40(s0)
30: fef42623 sw a5,-20(s0)
34: fec42783 lw a5,-20(s0)
38: 0007871b sext.w a4,a5
3c: 678d lui a5,0x3
3e: 03978793 addi a5,a5,57 # 3039 <.LASF30+0x2a9d>
42: 02f71463 bne a4,a5,6a <.L4>
46: 000007b7 lui a5,0x0
4a: 0007b783 ld a5,0(a5) # 0 <need_malloc>
4e: 6f9c ld a5,24(a5)
50: 86be mv a3,a5
52: 466d li a2,27
54: 4585 li a1,1
56: 000007b7 lui a5,0x0
5a: 00078513 mv a0,a5
5e: 00000097 auipc ra,0x0
62: 000080e7 jalr ra # 5e <main+0x40>
66: 4785 li a5,1
68: a869 j 102 <.L5>
000000000000006a <.L4>:
6a: 000007b7 lui a5,0x0
6e: 00078513 mv a0,a5
72: 00000097 auipc ra,0x0
76: 000080e7 jalr ra # 72 <.L4+0x8>
include/ChangeLog:
* dis-asm.h (riscv_symbol_is_valid): Declare.
opcodes/ChangeLog:
* disassembler.c (disassemble_init_for_target): Add RISC-V
initialisation.
* riscv-dis.c (riscv_symbol_is_valid): New function.
---
include/ChangeLog | 4 ++++
include/dis-asm.h | 1 +
opcodes/ChangeLog | 6 ++++++
opcodes/disassemble.c | 5 +++++
opcodes/riscv-dis.c | 18 ++++++++++++++++++
5 files changed, 34 insertions(+)
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 84627950c02..6a55f3c1e9a 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -302,6 +302,7 @@ extern void print_wasm32_disassembler_options (FILE *);
extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *);
extern bfd_boolean csky_symbol_is_valid (asymbol *, struct disassemble_info *);
+extern bfd_boolean riscv_symbol_is_valid (asymbol *, struct disassemble_info *);
extern void disassemble_init_powerpc (struct disassemble_info *);
extern void disassemble_init_s390 (struct disassemble_info *);
extern void disassemble_init_wasm32 (struct disassemble_info *);
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 750d76ad865..7370bd13593 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -656,6 +656,11 @@ disassemble_init_for_target (struct disassemble_info * info)
disassemble_init_powerpc (info);
break;
#endif
+#ifdef ARCH_riscv
+ case bfd_arch_riscv:
+ info->symbol_is_valid = riscv_symbol_is_valid;
+ break;
+#endif
#ifdef ARCH_wasm32
case bfd_arch_wasm32:
disassemble_init_wasm32 (info);
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 890f1f8e697..0ae9bbba64c 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -518,6 +518,24 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info)
return riscv_disassemble_insn (memaddr, insn, info);
}
+/* Prevent use of the fake labels that are generated as part of the DWARF
+ debug in the assembler. The fake labels are edefined in
+ gas/config/tc-riscv.h as FAKE_LABEL_NAME. */
+
+bfd_boolean
+riscv_symbol_is_valid (asymbol * sym,
+ struct disassemble_info * info ATTRIBUTE_UNUSED)
+{
+ const char * name;
+
+ if (sym == NULL)
+ return FALSE;
+
+ name = bfd_asymbol_name (sym);
+
+ return (strcmp (name, ".L0 ") != 0);
+}
+
void
print_riscv_disassembler_options (FILE *stream)
{
--
2.14.5
>
> Andreas.
>
> --
> Andreas Schwab, schwab@linux-m68k.org
> GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
> "And now for something completely different."
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