[PATCH] x86: fix AVX-512 16-bit addressing
Jan Beulich
JBeulich@suse.com
Wed Nov 22 08:06:00 GMT 2017
>>> On 21.11.17 at 20:06, <hjl.tools@gmail.com> wrote:
> On Mon, Nov 20, 2017 at 7:15 AM, Jan Beulich <JBeulich@suse.com> wrote:
>> Despite EVEX encodings not being available in real and VM86 modes,
>> 16-bit addressing still needs to be handled properly for 16-bit
>> protected mode as well as 16-bit addressing in 32-bit mode. Neither
>> should displacements be dropped silently by the assembler, nor should
>> the disassembler fail to correctly scale 8-bit displacements.
>> ---
>> I additionally doubt the other CODE_16BIT check (the conditional of
>> which is visible in patch context here) is correct either; I can't even
>> figure a way of how this conditional would be reachable in the first
>> place. Hence I wonder whether that code can be removed altogether.
>
>
>> gas/
Did you mean to reply to that remark, but then forgot?
>> --- a/gas/testsuite/gas/i386/avx512f.s
>> +++ b/gas/testsuite/gas/i386/avx512f.s
>> @@ -7262,6 +7262,10 @@ _start:
>> vptestnmq -1024(%edx){1to8}, %zmm5, %k5 # AVX512F Disp8
>> vptestnmq -1032(%edx){1to8}, %zmm5, %k5 # AVX512F
>>
>> + vaddps (%bx), %zmm0, %zmm0
>> + vaddps 0x40(%bx), %zmm0, %zmm0
>> + vaddps 0x1234(%bx), %zmm0, %zmm0
>> +
>> .intel_syntax noprefix
>> vaddpd zmm6, zmm5, zmm4 # AVX512F
>> vaddpd zmm6{k7}, zmm5, zmm4 # AVX512F
>> @@ -14520,3 +14524,7 @@ _start:
>> vptestnmq k5, zmm5, [edx+1024]{1to8} # AVX512F
>> vptestnmq k5, zmm5, [edx-1024]{1to8} # AVX512F Disp8
>> vptestnmq k5, zmm5, [edx-1032]{1to8} # AVX512F
>> +
>> + vaddps zmm0, zmm0, [bx]
>> + vaddps zmm0, zmm0, [bx+0x40]
>> + vaddps zmm0, zmm0, [bx+0x1234]
>
> Do these tests fail without assembler/disassembler changes?
The one without displacement works without the changes. The
ones with displacement would fail (each for a distinct reason).
Jan
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