[PATCH] x86-64: always use unsigned 32-bit relocation for 32-bit addressing
H.J. Lu
hjl.tools@gmail.com
Mon Nov 13 13:35:00 GMT 2017
On Mon, Nov 13, 2017 at 3:50 AM, Jan Beulich <JBeulich@suse.com> wrote:
> Except for %eip-relative addressing, where we don't have a suitable
> relocation type silently wrapping at the 4G boundary, consistently
> force use of R_X86_64_32 (in ELF terms) instead of its sign-extending
> counterpart. This wasn't right in case there was no base register in
> the addressing expression.
Since displacement is signed, won't it generate different code? Is there
a bug report to show it is necessary?
> Take the opportunity and also remove a redundant piece of code, which
> otherwise would need to be adjusted too.
>
> gas/
> 2017-11-13 Jan Beulich <jbeulich@suse.com>
>
> * config/tc-i386.c (build_modrm_byte): Add address override
> prefix checks alongside 64-bit mode ones.
> * testsuite/gas/i386/reloc64.s: Add 32-bit signed/unsigned
> relocation cases.
> * testsuite/gas/i386/reloc64.d: Adjust expectations.
>
> --- 2017-11-10/gas/config/tc-i386.c
> +++ 2017-11-10/gas/config/tc-i386.c
> @@ -6565,7 +6565,7 @@ build_modrm_byte (void)
> i.types[op].bitfield.disp8 = 0;
> i.types[op].bitfield.disp16 = 0;
> i.types[op].bitfield.disp64 = 0;
> - if (flag_code != CODE_64BIT)
> + if (flag_code != CODE_64BIT || i.prefix[ADDR_PREFIX])
> {
> /* Must be 32 bit */
> i.types[op].bitfield.disp32 = 1;
> @@ -6590,13 +6590,7 @@ build_modrm_byte (void)
> {
> i.rm.mode = 0;
> if (!i.disp_operands)
> - {
> - fake_zero_displacement = 1;
> - /* Instructions with VSIB byte need 32bit displacement
> - if there is no base register. */
> - if (i.tm.opcode_modifier.vecsib)
> - i.types[op].bitfield.disp32 = 1;
> - }
> + fake_zero_displacement = 1;
> if (i.index_reg == 0)
> {
> gas_assert (!i.tm.opcode_modifier.vecsib);
> @@ -6641,7 +6635,7 @@ build_modrm_byte (void)
> i.types[op].bitfield.disp8 = 0;
> i.types[op].bitfield.disp16 = 0;
> i.types[op].bitfield.disp64 = 0;
> - if (flag_code != CODE_64BIT)
> + if (flag_code != CODE_64BIT || i.prefix[ADDR_PREFIX])
> {
> /* Must be 32 bit */
> i.types[op].bitfield.disp32 = 1;
> --- 2017-11-10/gas/testsuite/gas/i386/reloc64.d
> +++ 2017-11-10/gas/testsuite/gas/i386/reloc64.d
> @@ -51,6 +51,10 @@ Disassembly of section \.text:
> .*[ ]+R_X86_64_TPOFF32[ ]+xtrn
> .*[ ]+R_X86_64_TPOFF32[ ]+xtrn
> .*[ ]+R_X86_64_GOTPLT64[ ]+xtrn
> +.*[ ]+R_X86_64_32S[ ]+xtrn
> +.*[ ]+R_X86_64_32[ ]+xtrn
> +.*[ ]+R_X86_64_32S[ ]+xtrn
> +.*[ ]+R_X86_64_32[ ]+xtrn
> Disassembly of section \.data:
> #...
> .*[ ]+R_X86_64_64[ ]+xtrn
> --- 2017-11-10/gas/testsuite/gas/i386/reloc64.s
> +++ 2017-11-10/gas/testsuite/gas/i386/reloc64.s
> @@ -218,3 +218,9 @@ bad call xtrn@gotplt
> bad .long xtrn@gotplt
> bad .word xtrn@gotplt
> bad .byte xtrn@gotplt
> +
> + .text
> + mov xtrn(,%rbx), %eax
> + mov xtrn(,%ebx), %eax
> + vgatherdps %xmm2, xtrn(,%xmm1), %xmm0
> + addr32 vgatherdps %xmm2, xtrn(,%xmm1), %xmm0
>
>
>
--
H.J.
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