binutils-2_28-branch: Assorted RISC-V Fixes
gingold
gingold@adacore.com
Thu Mar 23 10:53:00 GMT 2017
On 23/03/2017 00:04, Palmer Dabbelt wrote:
> Since 2.28 was released a few fixes have landed on master that I think are sane
> for the 2.28 branch. The patches have better descriptions, but they are:
>
> * Fixes to allow assembly of a half dozen or so compressed instructions.
> * Debug info relocation fixes.
> * Help text/documentation.
>
> Are these OK for the 2.28 branch?
Yes, that's fine.
>
> [PATCH 1/7] RISC-V: Fix [dis]assembly of srai/srli
> [PATCH 2/7] RISC-V: Fix the offset of CFA relocation.
> [PATCH 3/7] RISC-V: Fix DW_CFA_advance_loc relocation.
> [PATCH 4/7] RISC-V: Define DWARF2_USE_FIXED_ADVANCE_PC.
> [PATCH 5/7] RISC-V: Fix assembler for c.addi, rd can be x0
> [PATCH 6/7] RISC-V: Fix assembler for c.li, c.andi and c.addiw
> [PATCH 7/7] Sanitize RISC-V GAS help text, documentation
>
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