[PATCH v3] x86: fix handling of 64-bit operand size VPCMPESTR{I,M}

[H.J. Lu]

On Fri, Feb 24, 2017 at 8:33 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 24.02.17 at 16:51, <hjl.tools@gmail.com> wrote:
>> On Fri, Feb 24, 2017 at 1:26 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>> Just like REX.W affects operand size of the implicit rAX/rDX inputs to
>>> PCMPESTR{I,M}, VEX.W does for VPCMPESTR{I,M}. Allow Q or L suffixes on
>>> the instructions.
>>>
>>> Similarly the disassembler needs to be adjusted to no longer require
>>> VEX.W to be zero for the instructions to be valid, and to emit proper
>>> suffixes.
>>>
>>> Note, however, that this doesn't address the problem of there being no
>>> way to control (at least) {,E}VEX.W for 32- or 16-bit code. Nor does it
>>> address the problem of the many WIG instructions not getting properly
>>> disassembled when VEX.W=1.
>>>
>>> gas/
>>> 2017-02-24  Jan Beulich  <jbeulich@suse.com>
>>>
>>>         * testsuite/gas/i386/x86-64-avx.s: Add suffixed variants of
>>>         VPCMPESTR{I,M}.
>>>         * testsuite/gas/i386/x86-64-sse2avx.s: Likewise.
>>>         * testsuite/gas/i386/x86-64-sse4_2.s: Add suffixed variants
>>>         of PCMPESTR{I,M}.
>>>         * testsuite/gas/i386/ilp32/x86-64-avx-intel.d: Likewise.
>>>         * testsuite/gas/i386/ilp32/x86-64-avx.d: Likewise.
>>>         * testsuite/gas/i386/ilp32/x86-64-sse2avx.d: Likewise.
>>>         * testsuite/gas/i386/ilp32/x86-64-sse4_2-intel.d: Likewise.
>>>         * testsuite/gas/i386/ilp32/x86-64-sse4_2.d: Likewise.
>>>         * testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
>>>         * testsuite/gas/i386/x86-64-avx.d: Likewise.
>>>         * testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
>>>         * testsuite/gas/i386/x86-64-sse4_2-intel.d: Likewise.
>>>         * testsuite/gas/i386/x86-64-sse4_2.d: Likewise.
>>>
>>> opcodes/
>>> 2017-02-24  Jan Beulich  <jbeulich@suse.com>
>>>
>>>         * i386-dis.c (PCMPESTR_Fixup): New.
>>>         (VEX_W_0F3A60_P_2, VEX_W_0F3A61_P_2): Delete.
>>>         (prefix_table): Use PCMPESTR_Fixup.
>>>         (vex_len_table): Make VPCMPESTR{I,M} entries leaf ones and use
>>>         PCMPESTR_Fixup.
>>>         (vex_w_table): Delete VPCMPESTR{I,M} entries.
>>>         * i386-opc.tbl (pcmpestri, pcmpestrm, vpcmpestri, vpcmpestrm):
>>>         Split 64-bit and non-64-bit variants.
>>>         * opcodes/i386-tbl.h: Re-generate.
>>>
>>
>> I can't apply your patch.  Please send your patch as attachment.
>
> Here you go.
>
> Jan
>

OK.

Thanks.


-- 
H.J.