[PATCH] Fix the incorrect assembling for ppc wait mnemonic
Zavier Luo
zavier.luo@gmail.com
Mon Jun 20 07:56:00 GMT 2016
The wait mnemonic for ppc targets is incorrectly assembled due to
duplicated address definition with waitasec instruction. The issue causes
kernel boot calltrace for ppc targets when wait instruction is executed.
Signed-off-by: Zavier Luo <zavier.luo@gmail.com>
---
ChangeLog | 5 +++++
opcodes/ppc-opc.c | 3 +--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/ChangeLog b/ChangeLog
index e762ffd..c62136a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2016-06-20 Zavier Luo <zavier.luo@gmail.com>
+
+ * opcodes/ppc-opc.c: Remove the duplicated wait instruction to
+ fix incorrect assembling for ppc wait mnemonic.
+
2016-05-28 Alan Modra <amodra@gmail.com>
* Makefile.tpl (configure): Depend on m4 files included.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index f3349e5..0376bf5 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -4786,7 +4786,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
{"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}},
-{"wait", X(31,30), XWC_MASK, POWER9, 0, {WC}},
{"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
@@ -4840,7 +4839,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, 0, {0}},
{"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, 0, {0}},
-{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}},
+{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|POWER9, 0, {WC}},
{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
--
2.4.11
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