[PATCH, binutils/ARM] Add Thumb-2 long branch veneers

[Thomas Preudhomme]

Currently, the binutils will only generate thumb1 encoding veneer routine for 
long banch:

<__dest_veneer>:
push {r0}
ldr r0, [pc, #8] ; (800b17c <__dest_veneer+0xc>)
mov ip, r0
pop {r0}
bx ip
nop
.word 0x00000169

But the optimal way should be the following on target supporting thumb-2 
instruction set:

00008008 <__dest_veneer>:
ldr.w   ip, [pc, #4]  ; 8010 <__dest_veneer+0x8>
bx      ip
nop
.word   0x00108005
.word   0x00000000

This patch just use a new veneer instruction sequence called 
elf32_arm_stub_long_branch_thumb2_only to enable the thumb2 encoding veneer.

ChangeLog entries are as follow:


*** bfd/ChangeLog ***

2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
            Tony Wang  <tony.wang@arm.com>

        * elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
        sequence.
        (stub_long_branch_thumb2_only): Define stub.
        (arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
        (arm_stub_long_branch_thumb2_only): Likewise.
        (arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
        capable targets.


*** ld/testsuite/ChangeLog ***

2016-05-23  Thomas Preud'homme  <thomas.preudhomme@arm.com>
            Tony Wang  <tony.wang@arm.com>

        * ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile): Assemble for
        ARMv6-M.
        (Thumb2-Thumb2 farcall M profile): New testcase.
        * ld-arm/farcall-thumb2-thumb2-m.d: New file.
        * ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to reflect
        the use of Thumb-2 veneers for Thumb-2 capable targets.
        * ld-arm/jump-reloc-veneers-cond-long.d: Likewise.


Please find patch in attachment.

Testsuite shows no regression when run for arm-none-eabi target neither does 
GCC testsuite when targetting Thumb-2 target (-mcpu=cortex-m3).

Is this ok for master branch?

Best regards.

Thomas
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