[committed] MIPS/BFD: Correct register index calculation in BZ16_REG

[Maciej W. Rozycki]

On Sun, 24 Jan 2016, Andreas Schwab wrote:

> > diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
> > index 4ece819..176970a 100644
> > --- a/bfd/elfxx-mips.c
> > +++ b/bfd/elfxx-mips.c
> > @@ -13110,7 +13110,7 @@ static const struct opcode_descriptor bz_insns_16[] = {
> >  
> >  /* Switch between a 5-bit register index and its 3-bit shorthand.  */
> >  
> > -#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0x17) + 2)
> > +#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0xf) + 2)
> 
> It doesn't make sense to add 0x1e if you mask off 0x10 afterwards.

 Good point, 0xe would do, although the calculation is correct anyway.

  Maciej