[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field

[Renlin Li]

Hi all,

This is a patch to remove the internal CN register representation for
coprocessor filed used in aarch64 sys, sysl instruction.

SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}
SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2>

Cn, Cm filed are represented as as register in binutils. However, they are not.
They are just value encoded in CRn and CRm field. And they are used as immediate
instead of register number to access it's content.

So in this patch, the register representation is removed. The field is rename to
CRn and CRm, and constrained by immediate value range. AARCH64_OPND_QLF_CR qualifier
is also added for CRn, CRm filed to further guard the range of those immediate.

There will be two types of errors.

For example,
sysl x7, #1, x15, c3, #1
sysl x7, #1, c15, c16, #1

The first one is wrong type of operand. CRn operand should be used instead of x15 register.
Previously, this case is not properly handled. The following message will be given:
'''Fatal error: unhandled type 11'''

After the change. This case is also caught. And proper error message is printed.
'''operand 3 must be a 4-bit opcode field named for historical reasons C0 - C15 -- `sysl 
x7,#1,x15,C3,#1'

The second case is that c16 is out of range. The error message remains the same as before.

A new test instruction is added into diagnostic.s.
aarch64 binutils regression checked Okay without new regression. Okay to commit?

Regards,
Renlin Li

opcodes/ChangeLog:

2016-12-06 Renlin Li <renlin.li@arm.com>

	* aarch64-opc.c (aarch64_opnd_qualifiers): New CR value range
	qualifier.
	(operand_general_constraint_met_p): Remove case for CP_REG.
	(aarch64_print_operand): Print CRn, CRm operand using imm field.
	* aarch64-tbl.h (QL_SYS): Use CR qualifier.
	(QL_SYSL): Likewise.
	(aarch64_opcode_table): Change CRn, CRm operand class and type.
	* aarch64-opc-2.c : Regenerate.
	* aarch64-asm-2.c : Likewise.
	* aarch64-dis-2.c : Likewise.

include/ChangeLog:

2016-12-06 Renlin Li <renlin.li@arm.com>

	* opcode/aarch64.h (aarch64_operand_class): Remove
	AARCH64_OPND_CLASS_CP_REG.
	(enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
	AARCH64_OPND_Cm to AARCH64_OPND_CRm.
	(aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.

gas/ChangeLog:

2016-12-06 Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (AARCH64_REG_TYPES): Remove CN register.
	(get_reg_expected_msg): Remove CN register case.
	(parse_operands): rewrite parser for CRn, CRm operand.
	(reg_names): Remove CN register.
	* testsuite/gas/aarch64/diagnostic.s: Add a new test case.
	* testsuite/gas/aarch64/diagnostic.l: Adjust error message.



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