In the RX toolchain, the 'opcode' generated for register relative addressing with '0' displacement value is incorrect.

Vinay Kumar. G Vinay.G@kpit.com
Tue Sep 8 09:12:00 GMT 2015


Hi,

The RX toolchain does not generate correct 'opcode' for register relative addressing mode using '0' displacement value.

The below example is for "mov.b [Rs],dsp:5[Rd]" and "mov.b dsp:5[Rs],[Rd]" instructions. The same issue is also observed with "mov.w" and "mov.l" instructions.

For example: 
/*test.s */
mov.b   r0, [r0]
mov.b   r0, 0[r0]
mov.b   [r0], r0
mov.b   0[r0], r0

$rx-elf-as test.s -o test.o -al=test.lst 
$rx-elf-objdump -d test.o > test.o.dis

Actual results:
=========================================
$cat test.lst
1 0000 C3 00    mov.b   r0, [r0]
2 0002 C3 00    mov.b   r0, 0[r0]  --> should be "80 00  mov.b   r0, 0[r0]"
3 0004 CC 00    mov.b   [r0], r0
4 0006 CC 00    mov.b   0[r0], r0  --> should be "88 00  mov.b   0[r0], r0"

$cat test.o.dis
Disassembly of section P:
00000000 <P>:
   0:   c3 00   mov.b   r0, [r0]
   2:   c3 00   mov.b   r0, [r0] --> "80 00   mov.b   r0, [r0]"	(In objdump '0' is not visible)
   4:   cc 00   mov.b   [r0], r0
   6:   cc 00   mov.b   [r0], r0 --> "88 00   mov.b   r0, [r0]"	(In objdump '0' is not visible) 
=========================================   

Please review below patch and commit the same if OK. 
The patch is regression for rx-elf.
 
Best Regards,
Vinay  
 
/*******************************************************************/
gas/ChangeLog
2015-09-08  Vinay  <Vinay.G@kpit.com>

	* config/rx-parse.y: (rx_disp5op): Fix range check to include 0.
   
Index: gas/config/rx-parse.y
===================================================================
--- gas/config/rx-parse.y       (revision 2698)
+++ gas/config/rx-parse.y       (working copy)
@@ -1588,13 +1588,13 @@
   switch (msize)
     {
     case BSIZE:
-      if (0 < v && v <= 31)
+      if (0 <= v && v <= 31)
        return 1;
       break;
     case WSIZE:
       if (v & 1)
        return 0;
-      if (0 < v && v <= 63)
+      if (0 <= v && v <= 63)
        {
          exp->X_add_number >>= 1;
          return 1;
@@ -1603,7 +1603,7 @@
     case LSIZE:
       if (v & 3)
        return 0;
-      if (0 < v && v <= 127)
+      if (0 <= v && v <= 127)
        {
          exp->X_add_number >>= 2;
          return 1;



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