[committed, PATCH] Remove Disp16|Disp32 from 64-bit direct branches

[H.J. Lu]

On Thu, May 14, 2015 at 11:39 PM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 13.05.15 at 18:53, <hjl.tools@gmail.com> wrote:
>> On Wed, May 13, 2015 at 9:50 AM, Maciej W. Rozycki <macro@linux-mips.org>
>> wrote:
>>> On Wed, 13 May 2015, H.J. Lu wrote:
>>>
>>>> >> > Well, what do you suggest?  Your change is clearly wrong as well.
>>>> >>
>>>> >> I won't call it wrong since it implies there is a right.
>>>> >
>>>> > Of course there is a right.  The x86-64 specification is quite clear what
>>>> > happens with the prefix on jumps.  Intel CPUs are simply buggy in not
>>>> > implementing it.  And you're making binutils follow that buggy behaviour.
>>>>
>>>> AMD64 and Intel64 differ in some subtle ways.
>>>>
>>>> > And that is wrong.  The associated bug report is invalid.
>>>>
>>>> How about this
>>>>
>>>> 1.  Add flavors of AMD64 and Intel64 to assembler.  Make the most
>>>> permissive one as the default.  In case of call/jmp, the default will
>>>> take AMD64.
>>>> 2.  Add -Mintel64/-Mamd64 to objdump,  Make the most permissive
>>>> ones the default.
>>>
>>>  FWIW I think this will be the right direction, though the exact options
>>> may have to be discussed yet.
>>>
>>>  The assembler is a tool, it should not be forcing a use policy upon
>>> users.  Therefore it should allow whatever is encodable given the
>>> instruction set definition and let users decide themselves how to use
>>> it, whether implementations follow the rules or not.
>>>
>>>  And then if you want to add safety traps such as for this difference
>>> between individual model implementations, then wire them to `-march=' or
>>> suchlike.
>>
>> Thanks for your feedbacks.  I am waiting for feedbacks from Jan and
>> Michael before I start investigation.
>
> Not sure what else feedback you expect - after all I had suggested
> the introduction of command line options or alike to control the
> specific behavior. All I'm really after is that without any such override
> given behavior remain like what it is in 2.25.
>

That is what I checked in.

-- 
H.J.
---
AMD64 spec and Intel64 spec differ in direct unconditional branches in
64-bit mode.  AMD64 supports direct unconditional branches with 16-bit
offset via the data size prefix, which truncates RIP to 16 bits, while
the data size prefix is ignored by Intel64.

This patch adds -mamd64/-mintel64 option to x86-64 assembler and
-Mamd64/-Mintel64 option to x86-64 disassembler.  The most permissive
ISA, which is AMD64, is the default.

GDB can add an option, similar to

(gdb) help set disassembly-flavor
Set the disassembly flavor.
The valid values are "att" and "intel", and the default value is "att".

to select which ISA to disassemble.

binutils/

PR binutis/18386
gnu-6:pts/14[321]> m
0001-Support-AMD64-Intel-ISAs-in-assembler-disassembler.patch
Date: Fri, 15 May 2015 09:47:39 -0700
Subject: [PATCH] Support AMD64/Intel ISAs in assembler/disassembler

AMD64 spec and Intel64 spec differ in direct unconditional branches in
64-bit mode.  AMD64 supports direct unconditional branches with 16-bit
offset via the data size prefix, which truncates RIP to 16 bits, while
the data size prefix is ignored by Intel64.

This patch adds -mamd64/-mintel64 option to x86-64 assembler and
-Mamd64/-Mintel64 option to x86-64 disassembler.  The most permissive
ISA, which is AMD64, is the default.

GDB can add an option, similar to

(gdb) help set disassembly-flavor
Set the disassembly flavor.
The valid values are "att" and "intel", and the default value is "att".

to select which ISA to disassemble.

binutils/

PR binutis/18386
* doc/binutils.texi: Document -Mamd64 and -Mintel64.

gas/

PR binutis/18386
* config/tc-i386.c (OPTION_MAMD64): New.
(OPTION_MINTEL64): Likewise.
(md_longopts): Add -mamd64 and -mintel64.
(md_parse_option): Handle OPTION_MAMD64 and OPTION_MINTEL64.
(md_show_usage): Add -mamd64 and -mintel64.
* doc/c-i386.texi: Document -mamd64 and -mintel64.

gas/testsuite/

PR binutis/18386
* gas/i386/i386.exp: Run x86-64-branch-2 and x86-64-branch-3.
* gas/i386/x86-64-branch.d: Also pass -Mintel64 to objdump.
* gas/i386/ilp32/x86-64-branch.d: Likewise.
* gas/i386/x86-64-branch-2.d: New file.
* gas/i386/x86-64-branch-2.s: Likewise.
* gas/i386/x86-64-branch-3.l: Likewise.
* gas/i386/x86-64-branch-3.s: Likewise.

ld/testsuite/

PR binutis/18386
* ld-x86-64/tlsgdesc.dd: Also pass -Mintel64 to objdump.
* ld-x86-64/tlspic.dd: Likewise.
* ld-x86-64/x86-64.exp (x86_64tests): Also pass -Mintel64 to
objdump for tlspic.dd and tlsgdesc.dd.

opcodes/

PR binutis/18386
* i386-dis.c: Add comments for '@'.
(x86_64_table): Use '@' on call/jmp for X86_64_E8/X86_64_E9.
(enum x86_64_isa): New.
(isa64): Likewise.
(print_i386_disassembler_options): Add amd64 and intel64.
(print_insn): Handle amd64 and intel64.
(putop): Handle '@'.
(OP_J): Don't ignore the operand size prefix for AMD64 in 64-bit.
* i386-gen.c (cpu_flags): Add CpuAMD64 and CpuIntel64.
* i386-opc.h (AMD64): New.
(CpuIntel64): Likewise.
(i386_cpu_flags): Add cpuamd64 and cpuintel64.
* i386-opc.tbl: Add direct call/jmp with Disp16|Disp32 for AMD64.
Mark direct call/jmp without Disp16|Disp32 as Intel64.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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