[PATCH] add znver1 processor.

[Gopalasubramanian, Ganesh]

Attached patch adds the following.
	* New AMD znver1 processor. The architecture has the below features
		* TBM, FMA4, XOP, LWP: ISAs are not supported.
		* SMAP, RDSEED, SHA, XSAVEC, XSAVES, CLFLUSHOPT, ADCX: ISAs are supported.
	* New CLZERO instruction support. 
		* clzero has opcode "0F 01 FC".
		* clzero gets enabled with CPUID, 8000_0008, EBX[0] =1.
		* clzero instruction zero's out the 64 byte cache line specified in rax. Bits 5:0 of rAX are ignored

I have added two new arch test files.
	1. arch-13.s: Lists out the new ISAs that are supported and checks it against the march option.
	2. x86-64-arch-3.s: The 64-bit version of the test.

It passes make check on x86-64. Okay to commit?

Changelog:

2015-03-10  Ganesh Gopalasubramanian  <Ganesh.Gopalasubramanian@amd.com>

gas/

	* config/tc-i386.c (cpu_arch): Add PROCESSOR_ZNVER flags.
	(i386_align_code): Add PROCESSOR_ZNVER cases.
	* config/tc-i386.h (processor_type): Add PROCESSOR_ZNVER.
	* doc/c-i386.texi: Add znver1 and clzero.
	
gas/testsuite/
	* gas/i386/i386.exp: Add new znver1 test cases.
	* gas/i386/arch-13-znver1.d: New.
	* gas/i386/arch-13.d: New.
	* gas/i386/arch-13.s: New.
	* gas/i386/clzero.d: New.
	* gas/i386/clzero.s: New.
	* gas/i386/nops-1-znver1.d: New.
	* gas/i386/x86-64-arch-3-znver1.d: New.
	* gas/i386/x86-64-arch-3.d: New.
	* gas/i386/x86-64-arch-3.s: New.
	* gas/i386/x86-64-clzero.d: New.
	* gas/i386/x86-64-nops-1-znver1.d: New.
	
opcodes/
	* i386-dis.c (rm_table): Add clzero.
	* i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS.
	Add CPU_CLZERO_FLAGS.
	(cpu_flags): Add CpuCLZERO.
	* i386-opc.h: Add CpuCLZERO.
	* i386-opc.tbl: Add clzero.
	* i386-init.h: Re-generated.
	* i386-tbl.h: Re-generated.

Regards
Ganesh
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