[PATCH] Fix AVX512 vcvtt?ps2u?qq instructions disassembly (Intel syntax)/18631

[H.J. Lu]

On Mon, Jul 20, 2015 at 5:35 AM, Fomin, Alexander
<alexander.fomin@intel.com> wrote:
> For Intel AVX512 vcvtt?ps2u?qq instructions with broadcasting enabled,
> memory operand size should be DWORD, not QWORD.
>
> An additional Intel syntax test with memory operand and broadcasting enabled
> has been added to gas testsuite.
>
>
> gas/testsuite/gas/i386

It should be " gas/testsuite/".

>
>                 * avx512dq-intel.d: Replace “QWORD” with “DWORD” in

Please add gas/i386/ to file name and limit number of columns to 72.

> vcvtt?ps2u?qq instructions disassembly regexes.
>
> Add disassembly regex for new test.
>
>                 * avx512dq.d: Likewise.
>
>                 * avx512dq_vl-intel.d: Likewise.
>
>                 * avx512dq_vl.d: Likewise.
>
>                 * x86-64-avx512dq-intel.d: Likewise.
>
>                 * x86-64-avx512dq.d: Likewise.
>
>                 * x86-64-avx512dq_vl-intel.d: Likewise.
>
>                 * x86-64-avx512dq_vl.d: Likewise.
>
>                 * avx512dq.s: Add new test (Intel syntax, memory operand,
> broadcasting enabled).
>
>                 * avx512dq_vl.s: Likewise.
>
>                 * x86-64-avx512dq.s: Likewise.
>
>                 * x86-64-avx512dq_vl.s: Likewise.
>
>
>
> opcodes/
>
>                 * i386-dis-evex.h (EVEX_W_0F78_P_2): Replace “EXxmmq” with
> “EXEvexHalfBcstXmmq” for second operand.
>
>                 (EVEX_W_0F79_P_2): Likewise
>
>                 (EVEX_W_0F7A_P_2): Likewise
>
>                 (EVEX_W_0F7B_P_2): Likewise
>
>
>

Your mailer adds an extra blank line.  Please submit the updated patch
and make sure that your mailer doesn't change your patch.

Thanks.

H.J.