[PATCH, ARM 3/7] Add assembler support for ARMv8-M Baseline without security extensions

[Richard Earnshaw (lists)]

On 17/12/15 02:29, Thomas Preud'homme wrote:
> Hi,
> 
> This patch is part of a patch series to add support for ARMv8-M[1] to binutils. This specific patch adds support for ARMv8-M Baseline without security extensions instructions (except for the linker which is the subject of a following patch):
> 
> * it allows armv8-m.main to be recognized as an architecture
> * it allows all instructions added in ARMv8-M Mainline over ARMv6-M to be recognized, except for security extensions ones
> 
> [1] For a quick overview of ARMv8-M please refer to the initial cover letter.
> 
> 
> ChangeLog entries are as follow:
> 
> 
> *** binutils/ChangeLog ***
> 
> 2015-12-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
> 
>         * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch
>         value.
> 
> 
> *** gas/ChangeLog ***
> 
> 2015-12-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
> 
>         * config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions
>         shared between ARMv6T2 and ARMv8-M.
>         (move_or_literal_pool): Check mov.w/mvn and movw availability against
>         arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking
>         arm_arch_t2.
>         (do_t_branch): Error out for wide conditional branch instructions if
>         targetting ARMv8-M Baseline.
>         (non_v6t2_wide_only_insn): Add the logic for new wide-only instructions
>         in ARMv8-M Baseline.
>         (wide_insn_ok): New function.
>         (md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and
>         adapt error message for unsupported wide instruction to ARMv8-M
>         Baseline.
>         (insns): Reorganize instructions shared by ARMv8-M Baseline and
>         ARMv6t2 architecture.
>         (arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and
>         marvell-whitney cores.
>         (arm_archs): Define armv8-m.base architecture.
>         (cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version.
>         (aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for
>         ARMv8-M Mainline.  Set Tag_DIV_use for ARMv8-M Baseline as well.
> 
> 
> *** gas/testsuite/ChangeLog ***
> 
> 2015-12-16  Thomas Preud'homme  <thomas.preudhomme@arm.com>
> 
>         * gas/arm/archv8m-base.d: New file.
>         * gas/arm/attr-march-armv8m.base.d: Likewise.
>         * gas/arm/armv8m.base-idiv.d: Likewise.
>         * gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline.
> 
> 
> *** include/elf/ChangeLog ***
> 
> 2015-12-11  Thomas Preud'homme  <thomas.preudhomme@arm.com>
> 
>         * arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.
> 
> 
> *** include/opcode/ChangeLog ***
> 
> 2015-12-16  Thomas Preud'homme  <thomas.preudhomme@arm.com>
> 
>         * arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
>         (ARM_AEXT2_V8A): New architecture extension bitfield.
>         (ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
>         (ARM_AEXT_V8M_BASE): New architecture extension bitfield.
>         (ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
>         (ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
>         bitfield.
>         (ARM_ARCH_V6KT2): Likewise.
>         (ARM_ARCH_V6ZT2): Likewise.
>         (ARM_ARCH_V6KZT2): Likewise.
>         (ARM_ARCH_V7): Likewise.
>         (ARM_ARCH_V7A): Likewise.
>         (ARM_ARCH_V7VE): Likewise.
>         (ARM_ARCH_V7R): Likewise.
>         (ARM_ARCH_V7M): Likewise.
>         (ARM_ARCH_V7EM): Likewise.
>         (ARM_ARCH_V8A): Likewise.
>         (ARM_ARCH_V8M_BASE): New architecture bitfield.
>         (ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
>         (ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
>         bitfield and reindent.
>         (ARM_ARCH_V7A_MP_SEC): Likewise.
>         (ARM_ARCH_V7R_IDIV): Likewise.
>         (ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
>         (ARM_ARCH_V8A_SIMD): Likewise.
>         (ARM_ARCH_V8A_CRYPTOV1): Likewise.
> 
> 
> *** opcodes/ChangeLog ***
> 
> 2015-11-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>
> 
>         * arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
>         ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by
>         ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
> 

> @@ -17788,13 +17797,46 @@ in_it_block (void)
>  static bfd_boolean
>  non_v6t2_wide_only_insn (const struct asm_opcode *opcode)
>  {
> -  /* Thumb-1 wide instruction.  */
> +  /* Wide instruction that have always been in Thumb-1 ISA.  */
>    if (opcode->tencode == do_t_blx
>        || opcode->tencode == do_t_branch23
>        || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_msr)
>        || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_barrier))
>      return TRUE;
>  
> +  /* Wide-only instruction added to ARMv8-M.  */
> +  if (ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_v8m)
> +      || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_atomics)
> +      || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_v6t2_v8m)
> +      || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_div))
> +    return TRUE;
> +
> +  return FALSE;
> +}

See comment on patch 1 re function name.


> @@ -25516,6 +25578,7 @@ aeabi_set_public_attributes (void)
>    int fp16_optional = 0;
>    arm_feature_set flags;
>    arm_feature_set tmp;
> +  arm_feature_set arm_arch_v8m_base = ARM_ARCH_V8M_BASE;
>    const cpu_arch_ver_table *p;
>  
>    /* Choose the architecture based on the capabilities of the requested cpu
> @@ -25570,6 +25633,10 @@ aeabi_set_public_attributes (void)
>        && ARM_CPU_HAS_FEATURE (flags, arm_ext_v6_dsp))
>      arch = 13;
>  
> +  ARM_CLEAR_FEATURE (tmp, flags, arm_arch_v8m_base);
> +  if (arch == 16 && ARM_CPU_HAS_FEATURE (tmp, arm_arch_any))
> +    arch = 17;
> +

See comment on patch 2 re use of TAG_CPU_ARCH_...

Otherwise OK.

R.