[AArch64][PATCH 9/14] Support FP16 Adv.SIMD Modified Immediate instructions.

[Matthew Wahab]

ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds an FP16
instruction to the group Adv.SIMD Modified Immediate, making it
available when +simd+fp16 is enabled.

The instruction added is: FMOV.

The form of this instructions is
     <OP> <Hd>, #<imm>

Tested the series for aarch64-none-linux-gnu with cross-compiled
check-binutils and check-gas.

Ok for trunk?
Matthew

gas/testsuite/
2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/advsimd-fp16.d: Update expected output.
	* gas/aarch64/advsimd-fp16.s: Add tests for Adv.SIMD modified immediate
	instructions.

opcodes/
2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-tbl.h (QL_SIMD_IMM_H): New.
	(aarch64_opcode_table): Add fp16 version of fmov to the Adv.SIMD
	modified immediate group.

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