[AArch64][PATCH 1/3] Support ARMv8.2 FP16 floating point instructions.
Matthew Wahab
matthew.wahab@foss.arm.com
Thu Dec 10 15:25:00 GMT 2015
Committed: https://sourceware.org/ml/binutils-cvs/2015-11/msg00167.html
Is this ok for the 2.26 branch?
Matthew
On 24/11/15 11:49, Matthew Wahab wrote:
> ARMv8.2 adds 16-bit floating point operations as an optional extension
> to the ARMv8 FP support. This patch set adds support for the 16-bit FP
> instructions to binutils, enabling the instructions when both +fp and
> +fp16 architecture extensions are enabled.
>
> The patches in this series:
> - Add a feature macro for use by the encoding/decoding mechanism.
> - Adjust a utility function, used when disassembling, to support 16-bit
> floating point values.
> - Add the new scalar floating-point instructions.
>
> The patches depend on
> https://sourceware.org/ml/binutils/2015-11/msg00223.html, which adds the
> +fp16 option.
>
> This patch adds the feature macro FP_F16 to the AArch64 encoding/decoding
> mechanism, enabling it when both +fp and +fp16 are selected.
>
> Tested the series for aarch64-none-linux gnu with cross-compiled
> check-binutils and check-gas.
>
> opcodes/
> 2015-11-24 Matthew Wahab <matthew.wahab@arm.com>
>
> * aarch64-tbl.h (aarch64_feature_fp_f16): New.
> (FP_F16): New.
>
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