[PATCH] x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}

[H.J. Lu]

On Thu, Apr 16, 2015 at 7:16 AM, Jan Beulich <JBeulich@suse.com> wrote:
> As pointed out before, the documentation mandates the rounding mode to
> follow the GPR, so gas should accept such input. As the brojen code got
> released already we sadly will need to continue to also accept the
> badly ordered operands.
>
> gas/testsuite/
> 2015-04-16  Jan Beulich  <jbeulich@suse.com>
>
>         * gas/i386/avx512f-intel.d: Adjust expectations on operand order.
>         * gas/i386/evex-lig256-intel.d: Likewise.
>         * gas/i386/evex-lig512-intel.d: Likewise.
>         * gas/i386/x86-64-avx512f-intel.d: Likewise.
>         * gas/i386/x86-64-evex-lig256-intel.d: Likewise.
>         * gas/i386/x86-64-evex-lig512-intel.d: Likewise.
>
> opcodes/
> 2015-04-16  Jan Beulich  <jbeulich@suse.com>
>
>         * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}.
>         * i386-tbl.h: Regenerate.
>

I checked with our people.   Intel Software Developer Manual only governs
the output side of the binary form of instruction byte stream matches what
HW expect. Each assembly tool product has its own implementation of
transforming the input language/dialect into the output stream.  In case of
GNU assembler, operand order for AT&T and Intel syntax for AVX512 is
the one used in AVX512 testcases.

It is not OK.


-- 
H.J.