[Patch, MIPS] Add Octeon3 support

[Hurugalawadi, Naveen]

Hi,

Updating octeon3 in doc/c-mips.texi.

Please review the patch and let us know if there should be any
further modifications.

Thanks,

2014-10-08  Andrew Pinski  <apinski@cavium.com>

bfd/ChangeLog
        * archures.c: Add octeon3 for mips target.
        * bfd-in2.h: Regenerate.
        * bfd/cpu-mips.c: Define I_mipsocteon3.
        (arch_info_struct): Add octeon3 support.
        (_bfd_elf_mips_mach): Add support for octeon3.
        (mips_set_isa_flags): Add support for octeon3.
        (mips_mach_extensions): Make bfd_mach_mips_octeon3 an
        extension of bfd_mach_mips_octeon2.

gas/ChangeLog
        * config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3.
        (CPU_IS_OCTEON3): New define.
        (mips_cpu_info_table): Octeon3 enables virt ase.
        * doc/c-mips.texi: Document octeon3 as an acceptable value for
        -march=.

include/ChangeLog
        * elf/mips.h (INSN_OCTEON3, CPU_OCTEON3): Define.

opcodes/ChangeLog
        * mips-dis.c (mips_arch_choices): Add octeon3.
        * mips-opc.c (IOCT): Include INSN_OCTEON3.
        (IOCT2): Likewise.
        (IOCT3): New define.
        (IVIRT): New define.
        (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
        tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
        IVIRT instructions.
        Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
        operand for IOCT3.
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