[Patch][AArch64] - Error on load pair to same register

Jiong Wang jiong.wang@arm.com
Mon Nov 17 15:26:00 GMT 2014


On 17/11/14 14:57, Ryan Mansfield wrote:
> On 14-11-13 05:20 AM, Jiong Wang wrote:
>> On 12/11/14 20:07, Ryan Mansfield wrote:
>>> I doubt that any one would intentionally do this operation since the
>>> behaviour is unpredictable so it just seems safer to reject the code.
>> Hi Ryan,
>>
>>     thanks for reporting  this.
>>
>>     I think the encoding of same register is allowed in ISA manual, while
>>     the behavior is unpredictable. In principle, all allowed encoding need
>>     to be supported, while if its behavior is unpredictable, then we need
>>     to give warning instead of error which abort the assembling.
> Hi Jiong,
>
> Thanks for your comments. If it's a warning that should be issued, then
> operand_general_constraint_met_p in libopcodes probably isn't the place
> to be warning from, and better to handle it in md_assemble after the
> operands have already been parsed.
>
> I added some warnings about unpredictable writebacks as well. I realize
> there's many more unpredictable conditions in the ARMv8 ARM. If anyone
> feels like these are valuable to catch at assemble time, I can go and
> add more checks.
>
> 2014-11-17  Ryan Mansfield  <rmansfield@qnx.com>
>
>           * config/tc-aarch64.c (md_assemble): Call warn_unpredictable.
>           (warn_unpredictable): New.
>
> 2014-11-17  Ryan Mansfield  <rmansfield@qnx.com>
>
>           * gas/aarch64/diagnostic.s: Add new warnings test patterns.
>           * gas/aarch64/diagnostic.l: Update expected diagnostic output.

thanks, this looks good to me.

but please wait gate keeper's final review and approval.

Regards,
Jiong




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