[PATCH, committed] Nios II CALL26 linker relaxation

[Sandra Loosemore]

The Nios II CALL and JMPI instructions take a 26-bit relocation that
encodes the low-order bits of a destination address in the same 256MB
memory segment as the source address.  Presently, the linker does
nothing but give a "relocation truncated to fit" error when such
relocations cross segment boundaries.

This patch was developed at the request of Altera to remove this 
restriction by having the linker add a trampoline within range of the 
original CALL/JMPI.  The generic --relax/--no-relax linker command-line 
option controls generation of the trampolines (it defaults to being 
enabled).

There is also a new relocation added, R_NIOS2_CALL26_NOAT, which 
preserves the current behavior of R_NIOS2_CALL26 (no trampoline 
insertion).  Like the assembler branch relaxations, the linker-generated 
trampolines use the AT register as a temporary, but it must not do this 
in code assembled with the .noat directive in effect, so the assembler 
emits the new relocation to mark non-relaxable calls for the linker. 
Altera has agreed to document this extension to the ABI in future 
revisions of the processor reference handbook.

I cut-and-pasted much of the implementation of the relaxation code from 
the metag backend, with some references also to ARM and other targets. 
The main differences compared to those other targets are that (a) the 
relocations are absolute rather than PC-relative, which affects the 
grouping strategy; and (b) when a section straddles a segment boundary, 
some stubs might need to be placed before the section and some after -- 
these are represented as different stub types in the code.

In addition to the test cases included with the patch, Altera beat on it 
for a while with a random test-case generator, so we're pretty confident 
that it's working.  :-)

-Sandra

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