[PATCH, AArch64] Fix float const0 parsing glitch

[Jiong Wang]

Hi,

This patch fixes a glitch in AARCH64 assembler.

When parsing float immediate zero, both #0 and #0.0 are expected.

The patch passes regression test on aarch64-none-elf.

OK for trunk and 2.24 branch?

Thanks,
Jiong

opcodes/

       * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
       FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.

gas/testsuite/

       * gas/aarch64/fp-const0-parsing.s: New test.
       * gas/aarch64/fp-const0-parsing.d: Likewise.

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