[COMMITTED] aarch64 dwarf2 fixes

[Richard Henderson]

I've now committed the three patches that I posted 2 weeks ago re aarch64
dwarf2 encoding problems.

Without feedback from ARM, I didn't disable the acceptance of the [bhs]N names
for the vector registers in the context of .cfi_register et al.  I merely
accept all of the vector register names and give them the proper column number.

The actual commit is in three parts, squashed here because I was lazy in
generating the email.


r~
-------------- next part --------------
binutils/
	* dwarf.h (init_dwarf_regnames_aarch64): Declare.
	* dwarf.c (dwarf_regnames_aarch64): New.
	(init_dwarf_regnames_aarch64): New.
	(init_dwarf_regnames): Call it.
	* objdump.c (dump_dwarf): Likewise.
gas/
	* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
	register number for vector register types.
	* config/tc-aarch64.h (DWARF2_LINE_MIN_INSN_LENGTH): Set to 4.
	(DWARF2_CIE_DATA_ALIGNMENT): Set to -8.


diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index a6986ad..348e20f 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -5093,6 +5093,29 @@ init_dwarf_regnames_x86_64 (void)
   dwarf_regnames_count = ARRAY_SIZE (dwarf_regnames_x86_64);
 }
 
+static const char *const dwarf_regnames_aarch64[] =
+{
+   "x0",  "x1",  "x2",  "x3",  "x4",  "x5",  "x6",  "x7", 
+   "x8",  "x9", "x10", "x11", "x12", "x13", "x14", "x15", 
+  "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",
+  "x24", "x25", "x26", "x27", "x28", "x29", "x30", "sp",
+   NULL, "elr",  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
+   NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
+   NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
+   NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,  NULL,
+   "v0",  "v1",  "v2",  "v3",  "v4",  "v5",  "v6",  "v7", 
+   "v8",  "v9", "v10", "v11", "v12", "v13", "v14", "v15", 
+  "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
+  "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
+};
+
+void
+init_dwarf_regnames_aarch64 (void)
+{
+  dwarf_regnames = dwarf_regnames_aarch64;
+  dwarf_regnames_count = ARRAY_SIZE (dwarf_regnames_aarch64);
+}
+
 void
 init_dwarf_regnames (unsigned int e_machine)
 {
@@ -5109,6 +5132,10 @@ init_dwarf_regnames (unsigned int e_machine)
       init_dwarf_regnames_x86_64 ();
       break;
 
+    case EM_AARCH64:
+      init_dwarf_regnames_aarch64 ();
+      break;
+
     default:
       break;
     }
diff --git a/binutils/dwarf.h b/binutils/dwarf.h
index db235a9..124d9d6 100644
--- a/binutils/dwarf.h
+++ b/binutils/dwarf.h
@@ -235,6 +235,7 @@ extern int dwarf_check;
 extern void init_dwarf_regnames (unsigned int);
 extern void init_dwarf_regnames_i386 (void);
 extern void init_dwarf_regnames_x86_64 (void);
+extern void init_dwarf_regnames_aarch64 (void);
 
 extern int load_debug_section (enum dwarf_section_display_enum, void *);
 extern void free_debug_section (enum dwarf_section_display_enum);
diff --git a/binutils/objdump.c b/binutils/objdump.c
index 5086a15..413de56 100644
--- a/binutils/objdump.c
+++ b/binutils/objdump.c
@@ -2407,6 +2407,10 @@ dump_dwarf (bfd *abfd)
 	}
       break;
 
+    case bfd_arch_aarch64:
+      init_dwarf_regnames_aarch64();
+      break;
+
     default:
       break;
     }
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 0a65b9d..da91134 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -5966,12 +5966,15 @@ tc_aarch64_regname_to_dw2regnum (char *regname)
     case REG_TYPE_SP_64:
     case REG_TYPE_R_32:
     case REG_TYPE_R_64:
+      return reg->number;
+
     case REG_TYPE_FP_B:
     case REG_TYPE_FP_H:
     case REG_TYPE_FP_S:
     case REG_TYPE_FP_D:
     case REG_TYPE_FP_Q:
-      return reg->number;
+      return reg->number + 64;
+
     default:
       break;
     }
diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
index 94a3dc9..3d4ffc5 100644
--- a/gas/config/tc-aarch64.h
+++ b/gas/config/tc-aarch64.h
@@ -145,13 +145,13 @@ struct aarch64_frag_type
       goto LABEL;								\
     }
 
-#define DWARF2_LINE_MIN_INSN_LENGTH 	2
+#define DWARF2_LINE_MIN_INSN_LENGTH 	4
 
 /* The lr register is r30.  */
 #define DWARF2_DEFAULT_RETURN_COLUMN  30
 
 /* Registers are generally saved at negative offsets to the CFA.  */
-#define DWARF2_CIE_DATA_ALIGNMENT     (-4)
+#define DWARF2_CIE_DATA_ALIGNMENT     (-8)
 
 extern int aarch64_dwarf2_addr_size (void);
 #define DWARF2_ADDR_SIZE(bfd) aarch64_dwarf2_addr_size ()