[PATCH] Add support for MIPS eretnc MIPS32r5 instruction

Andrew Bennett Andrew.Bennett@imgtec.com
Fri Apr 25 10:07:00 GMT 2014


>Andrew Bennett <Andrew.Bennett@imgtec.com> writes:
>> This patch adds support for the eretnc MIPS32r5 instruction.  For more 
>> information on the instruction please refer to:
>> http://www.imgtec.com/powervr/insider/powervr-login.asp?doc=MD00087v6
>>
>> The patch and ChangeLog entry are shown below.
>
> This is the first time that we've distinguished between r2 and r5 in the
> base ISA, so at this point I think we really do need to make binutils aware
> of r5 as a separate architecture revision, rather than adding it to r2.
> It'd probably make sense to add r3 at the same time, since it seems odd
> to have r5 without r3.
> 
> It's OK to mark the output as r2 for now, since that's the best we have.
> Matthew's changes should let us fix it up later.  But we should model r5
> separately in the user interface and internally.

Thats fine.  I will rework the patch and then post it back on the list.

Regards,


Andrew



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