[PATCH] AIX: fix use of TOC symbols before definition

Tristan Gingold gingold@adacore.com
Wed Sep 4 10:22:00 GMT 2013


Hello,

on XCOFF, when assembling an instruction, gas choose between a TOC16 and a 16bit reloc
according to the symbol.  But the symbol may be not yet defined, generating a wrong
relocation (it was triggered with code produced by gcc).

This patch changes the reloc in md_apply_fix in such case.

No regression in gas testsuite.

Ok for trunk ?

Tristan.

2013-09-02  Tristan Gingold  <gingold@adacore.com>

gas/
	* config/tc-ppc.c (md_apply_fix): Handle defined after use toc
	symbols.

gas/testsuite/
	* gas/ppc/aix.exp: Run xcoff-toc-1 test.
	* gas/ppc/xcoff-toc-1.s, gas/ppc/xcoff-toc-1.d: New test.


diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 1631fb7..6b54f5a 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -3146,6 +3146,7 @@ md_assemble (char *str)
 		   && (operand->bitm & 0xfff0) == 0xfff0
 		   && operand->shift == 0)
 	    {
+	      /* Note: the symbol may be not yet defined.  */
 	      if (ppc_is_toc_sym (ex.X_add_symbol))
 		{
 		  reloc = BFD_RELOC_PPC_TOC16;
@@ -6363,6 +6364,15 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
 	  value = fixP->fx_offset;
 	  fixP->fx_done = 1;
 	}
+
+       /* During parsing of instructions, a TOC16 reloc is generated for
+          instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
+          in the toc.  But at parse time, SYM may be not yet defined, so
+          check again here.  */
+       if (fixP->fx_r_type == BFD_RELOC_16
+           && fixP->fx_addsy != NULL
+           && ppc_is_toc_sym (fixP->fx_addsy))
+         fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
 #endif
     }
 
@@ -6873,6 +6883,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
       fixP->fx_addnumber =
 	- bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
 	- S_GET_VALUE (ppc_toc_csect);
+      /* Set *valP to avoid errors.  */
+      *valP = value;
 #endif
     }
 #endif
diff --git a/gas/testsuite/gas/ppc/aix.exp b/gas/testsuite/gas/ppc/aix.exp
index 2789837..9612f27 100644
--- a/gas/testsuite/gas/ppc/aix.exp
+++ b/gas/testsuite/gas/ppc/aix.exp
@@ -67,6 +67,7 @@ if [istarget powerpc-ibm-aix*] then {
     run_dump_test "xcoff-branch-1-64"
     run_dump_test "xcoff-br16-1"
     run_dump_test "xcoff-br16-2"
+    run_dump_test "xcoff-toc-1"
 
     run_list_test "xcoff-ref-1"
 
diff --git a/gas/testsuite/gas/ppc/xcoff-toc-1.d b/gas/testsuite/gas/ppc/xcoff-toc-1.d
new file mode 100644
index 0000000..bb85694
--- /dev/null
+++ b/gas/testsuite/gas/ppc/xcoff-toc-1.d
@@ -0,0 +1,12 @@
+#as: -a32
+#source: xcoff-toc-1.s
+#objdump: -dr
+#name: XCOFF TOC reloc test 1
+
+.*
+Disassembly of section \.text:
+
+00000000 <\.foo>:
+   0:	80 22 00 00 	l       r1,0\(r2\)
+			2: R_TOC	data-0x10010
+   4:	4e 80 00 20 	br
diff --git a/gas/testsuite/gas/ppc/xcoff-toc-1.s b/gas/testsuite/gas/ppc/xcoff-toc-1.s
new file mode 100644
index 0000000..ac491ae
--- /dev/null
+++ b/gas/testsuite/gas/ppc/xcoff-toc-1.s
@@ -0,0 +1,21 @@
+	.csect _rw_[RW],4
+	.toc
+
+	.csect .text[PR]
+	.align 2
+	.lglobl .foo
+	.csect foo[DS]
+foo:
+	.long .foo, TOC[tc0], 0
+	.csect .text[PR]
+.foo:
+	lwz 1,LC..72(2)
+	blr
+	.align 2
+	.toc
+LC..72:
+	.tc data[TC],data
+	.csect _rw_[RW],4
+	.align 2
+data:
+	.space 0x10000



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