[PATCH] Reorder MSA branches

[Richard Sandiford]

Chao-Ying Fu <Chao-Ying.Fu@imgtec.com> writes:
> Version 2.
> Because the MSA registers share the FP registers (if the FPU is present),
> we combine FP and MSA register dependences together.

I think we should go for this one.  The patch looks good with the testcase
added to the testsuite.

One very minor formatting nit though:

> @@ -4161,7 +4161,8 @@ fpr_read_mask (const struct mips_cl_insn
>    unsigned long pinfo;
>    unsigned int mask;
>  
> -  mask = insn_reg_mask (ip, (1 << OP_REG_FP) | (1 << OP_REG_VEC),
> +  mask = insn_reg_mask (ip, (1 << OP_REG_FP) | (1 << OP_REG_VEC)
> +			    | (1 << OP_REG_MSA),
>  			insn_read_mask (ip->insn_mo));
>    pinfo = ip->insn_mo->pinfo;
>    /* Conservatively treat all operands to an FP_D instruction are doubles.
> @@ -4179,7 +4180,8 @@ fpr_write_mask (const struct mips_cl_ins
>    unsigned long pinfo;
>    unsigned int mask;
>  
> -  mask = insn_reg_mask (ip, (1 << OP_REG_FP) | (1 << OP_REG_VEC),
> +  mask = insn_reg_mask (ip, (1 << OP_REG_FP) | (1 << OP_REG_VEC)
> +			    | (1 << OP_REG_MSA),
>  			insn_write_mask (ip->insn_mo));
>    pinfo = ip->insn_mo->pinfo;
>    /* Conservatively treat all operands to an FP_D instruction are doubles.

In these two cases, please add an extra "(" (the GCC emacs indentation rule).

  mask = insn_reg_mask (ip, ((1 << OP_REG_FP) | (1 << OP_REG_VEC)
			     | (1 << OP_REG_MSA)),

Thanks,
Richard