[committed] Remove MIPS +D and +T operands

[Richard Sandiford]

"Maciej W. Rozycki" <macro@codesourcery.com> writes:
> On Sun, 7 Jul 2013, Richard Sandiford wrote:
>
>> This patch removes the "+D" and "+T" entries and gets the disassembler to
>> look directly for ",H".  It also uses a "0" at the end of the opcode
>> name to distinguish coprocessor 0 instructions; this showed that the
>> MIPS I LWC0 instruction wasn't being treated as coprocessor 0.
>
>  But why do we support things like LWC0 or SWC0 in the first place?  
> There are no such instructions.

No idea, sorry.  Maybe a processor-specific extension?

Richard